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Searched refs:InputRegs (Results 1 – 7 of 7) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp1285 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1290 return getRegSequenceLikeInputs(MI, DefIdx, InputRegs); in getRegSequenceInputs()
1304 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h510 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
1224 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs() argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp765 AMDGPUFunctionArgInfo::PreloadedValue InputRegs[] = { in passSpecialInputs() local
781 for (auto InputID : InputRegs) { in passSpecialInputs()
H A DSIISelLowering.cpp2710 AMDGPUFunctionArgInfo::PreloadedValue InputRegs[] = { in passSpecialInputs() local
2720 for (auto InputID : InputRegs) { in passSpecialInputs()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h62 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
H A DARMBaseInstrInfo.cpp5338 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
5351 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5356 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp4008 SmallVector<SrcOp, 4> InputRegs(NumSrcOps, Register()); in reduceOperationWidth() local
4031 InputRegs[J] = ExtractedRegs[J][I]; in reduceOperationWidth()
4035 Inst = MIRBuilder.buildInstr(Opc, {NarrowDstTy}, InputRegs, Flags); in reduceOperationWidth()
4037 Inst = MIRBuilder.buildInstr(Opc, {NarrowDstTy, NarrowDstTy}, InputRegs, in reduceOperationWidth()