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/netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/
H A Dc_dsp32mult_dr_m_i.s16 R4.L = R0.H * R0.L (IS);
17 R5.H = R0.L * R1.L (IS);
18 R6.L = R1.L * R0.H (IS);
19 R7.L = R1.L * R1.L (IS);
20 R0.H = R0.L * R0.L (IS);
21 R1.L = R0.L * R1.L (IS);
22 R2.L = R1.H * R0.L (IS);
23 R3.H = R1.L * R1.L (IS);
41 R5.H = R2.L * R2.L (IS);
42 R6.L = R2.L * R3.H (IS);
[all …]
H A Dc_dsp32mult_dr_i.s16 R4.H = R0.L * R0.L, R4.L = R0.L * R0.L (IS);
17 R5.H = R0.L * R1.L, R5.L = R0.L * R1.H (IS);
18 R6.H = R1.L * R0.L, R6.L = R1.H * R0.L (IS);
19 R7.H = R1.L * R1.L, R7.L = R1.H * R1.H (IS);
20 R0.H = R0.L * R0.L, R0.L = R0.L * R0.L (IS);
21 R1.H = R0.L * R1.L, R1.L = R0.L * R1.H (IS);
22 R2.H = R1.L * R0.L, R2.L = R1.H * R0.L (IS);
23 R3.H = R1.L * R1.L, R3.L = R1.H * R1.H (IS);
41 R4.H = R2.L * R2.H, R4.L = R2.H * R2.L (IS);
42 R5.H = R2.L * R3.H, R5.L = R2.H * R3.H (IS);
[all …]
H A Dc_dsp32mult_pair_m_i.s16 R0 = R0.L * R0.L (IS);
17 R2 = R0.L * R1.H (IS);
18 R4 = R1.H * R1.H (IS);
19 R6 = R0.L * R0.L (IS);
37 R0 = R2.L * R2.L (IS);
38 R2 = R2.L * R3.H (IS);
39 R4 = R3.H * R2.H (IS);
40 R6 = R2.L * R3.L (IS);
58 R0 = R4.L * R4.L (IS);
59 R2 = R4.L * R5.H (IS);
[all …]
H A Dc_dsp32mult_pair_i.s16 R1 = R0.L * R0.L, R0 = R0.L * R0.L (IS);
17 R3 = R0.L * R1.L, R2 = R0.L * R1.H (IS);
18 R5 = R1.L * R0.L, R4 = R1.H * R0.L (IS);
19 R7 = R1.L * R1.L, R6 = R1.H * R1.H (IS);
37 R1 = R2.L * R2.L, R0 = R2.L * R2.L (IS);
38 R3 = R2.L * R3.L, R2 = R2.L * R3.H (IS);
39 R5 = R3.L * R2.L, R4 = R3.H * R2.L (IS);
40 R7 = R3.L * R3.L, R6 = R3.H * R3.H (IS);
58 R1 = R4.L * R4.L, R0 = R4.L * R4.L (IS);
59 R3 = R4.L * R5.L, R2 = R4.L * R5.H (IS);
[all …]
H A Dc_dsp32mac_dr_a1_i.s21 R0.H = ( A1 = R1.L * R0.L ), A0 = R1.L * R0.L (IS);
23 R2.H = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L (IS);
25 R4.H = ( A1 = R4.H * R5.L ), A0 += R4.H * R5.H (IS);
27 R6.H = ( A1 = R6.H * R7.H ), A0 += R6.L * R7.H (IS);
47 R0.H = ( A1 = R1.L * R0.L ) (IS);
49 R2.H = ( A1 += R2.L * R3.H ) (IS);
51 R4.H = ( A1 = R4.H * R5.L ) (IS);
53 R6.H = ( A1 = R6.H * R7.H ) (IS);
73 R0.H = A1 , A0 = R1.L * R0.L (IS);
75 R2.H = A1 , A0 = R2.H * R3.L (IS);
[all …]
H A Dc_dsp32mac_pair_a0_i.s19 A1 += R1.L * R0.L, R6 = ( A0 -= R1.L * R0.L ) (IS);
21 A1 = R2.L * R3.L, R0 = ( A0 = R2.H * R3.L ) (IS);
24 A1 = R7.L * R4.L, R2 = ( A0 += R7.H * R4.H ) (IS);
26 A1 += R6.L * R5.L, R4 = ( A0 += R6.L * R5.H ) (IS);
50 A1 += R1.L * R0.H, R4 = ( A0 = R1.L * R0.L ) (IS);
52 A1 -= R2.L * R3.H, R0 = ( A0 -= R2.H * R3.L ) (IS);
54 A1 -= R4.L * R5.H, R2 = ( A0 += R4.H * R5.H ) (IS);
56 A1 += R6.L * R7.H, R0 = ( A0 += R6.L * R7.H ) (IS);
79 A1 += R1.H * R0.L, R4 = ( A0 -= R1.L * R0.L ) (IS);
81 A1 -= R2.H * R3.L, R6 = ( A0 = R2.H * R3.L ) (IS);
[all …]
H A Dc_dsp32mac_pair_a1_i.s19 R7 = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L (IS);
21 R1 = ( A1 = R2.L * R3.L ), A0 -= R2.H * R3.L (IS);
23 R3 = ( A1 = R7.L * R4.L ), A0 += R7.H * R4.H (IS);
25 R5 = ( A1 += R6.L * R5.L ), A0 += R6.L * R5.H (IS);
48 R5 = ( A1 += R1.L * R0.H ), A0 = R1.L * R0.L (IS);
50 R1 = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L (IS);
52 R3 = ( A1 = R4.L * R5.H ), A0 -= R4.H * R5.H (IS);
54 R1 = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H (IS);
77 R5 = ( A1 += R1.H * R0.L ), A0 -= R1.L * R0.L (IS);
79 R7 = ( A1 -= R2.H * R3.L ), A0 = R2.H * R3.L (IS);
[all …]
H A Dc_dsp32mac_pair_a1a0_i.s19 R7 = ( A1 += R1.L * R0.L ), R6 = ( A0 = R1.L * R0.L ) (IS);
22 R1 = ( A1 = R2.L * R3.L ), R0 = ( A0 = R2.H * R3.L ) (IS);
25 R3 = ( A1 = R7.L * R4.L ), R2 = ( A0 += R7.H * R4.H ) (IS);
28 R5 = ( A1 += R6.L * R5.L ), R4 = ( A0 += R6.L * R5.H ) (IS);
54 R5 = ( A1 += R1.L * R0.H ), R4 = ( A0 = R1.L * R0.L ) (IS);
57 R1 = ( A1 = R2.L * R3.H ), R0 = ( A0 -= R2.H * R3.L ) (IS);
61 R3 = ( A1 -= R4.L * R5.H ), R2 = ( A0 += R4.H * R5.H ) (IS);
64 R1 = ( A1 += R6.L * R7.H ), R0 = ( A0 += R6.L * R7.H ) (IS);
90 R5 = ( A1 += R1.H * R0.L ), R4 = ( A0 = R1.L * R0.L ) (IS);
93 R7 = ( A1 = R2.H * R3.L ), R6 = ( A0 = R2.H * R3.L ) (IS);
[all …]
H A Dc_dsp32mac_dr_a0_i.s22 A1 = R1.L * R0.L, R0.L = ( A0 = R1.L * R0.L ) (IS);
24 A1 -= R2.L * R3.H, R2.L = ( A0 = R2.H * R3.L ) (IS);
26 A1 -= R4.H * R5.L, R4.L = ( A0 += R4.H * R5.H ) (IS);
28 A1 += R6.H * R7.H, R6.L = ( A0 -= R6.L * R7.H ) (IS);
48 R0.L = ( A0 -= R1.L * R0.L ) (IS);
50 R2.L = ( A0 += R2.L * R3.H ) (IS);
52 R4.L = ( A0 = R4.H * R5.L ) (IS);
54 R6.L = ( A0 -= R6.H * R7.H ) (IS);
74 R0.L = ( A0 = R1.L * R0.L ) (IS);
76 R2.L = ( A0 -= R2.H * R3.L ) (IS);
[all …]
H A Dc_dsp32mac_pair_a1a0_m.s20 R7 = ( A1 += R0.L * R1.L ) (M), R6 = ( A0 = R0.L * R1.L ) (IS);
23 R1 = ( A1 = R3.L * R2.L ) (M), R0 = ( A0 = R3.H * R2.L ) (IS);
26 R3 = ( A1 -= R7.L * R6.L ) (M), R2 = ( A0 += R7.H * R6.H ) (IS);
29 R5 = ( A1 += R5.L * R4.L ) (M), R4 = ( A0 += R5.L * R4.H ) (IS);
55 R5 = A1, R4 = ( A0 = R3.L * R1.L ) (IS);
58 R1 = A1, R0 = ( A0 -= R0.H * R5.L ) (IS);
61 R3 = A1, R2 = ( A0 += R2.H * R7.H ) (IS);
64 R1 = A1, R0 = ( A0 -= R4.L * R6.H ) (IS);
90 R5 = ( A1 += R4.H * R3.L ) (M), R4 = ( A0 = R4.L * R3.L ) (IS);
93 R7 = A1, R6 = ( A0 = R5.H * R0.L ) (IS);
[all …]
H A Drandom_0027.S13 R4.H = (A1 -= R5.L * R1.L) (M, IS);
24 R4.H = (A1 -= R7.L * R7.H) (M, IS);
36 R7 = (A1 -= R4.L * R1.L) (M, IS);
47 A1 -= R3.L * R7.L (M, IS);
57 A1 += R5.L * R7.L (M, IS);
67 A1 += R7.L * R3.H (M, IS);
77 R5.H = (A1 += R5.L * R3.H) (M, IS);
88 A1 += R0.L * R7.L (M, IS);
98 A1 += R7.L * R0.L (M, IS);
108 A1 -= R0.L * R7.L (M, IS);
[all …]
H A Dm4.s25 A1 += R0.L * R1.L, A0 += R0.L * R1.L (IS);
34 A1 += R0.H * R1.L, A0 += R0.H * R1.L (IS);
43 A1 += R0.H * R1.H, A0 += R0.H * R1.H (IS);
57 A1 += R0.L * R1.L, A0 += R0.L * R1.L (IS);
69 A1 += R0.L * R1.H, A0 += R0.L * R1.H (IS);
83 A1 -= R0.H * R1.L, A0 -= R0.H * R1.L (IS);
95 A1 -= R0.L * R1.L, A0 -= R0.L * R1.L (IS);
104 A1 -= R0.H * R1.H, A0 -= R0.H * R1.H (IS);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
H A DScheduler.cpp73 Instruction *IS = IR.getInstruction(); in issueInstructionImpl() local
74 const InstrDesc &D = IS->getDesc(); in issueInstructionImpl()
82 IS->execute(IR.getSourceIndex()); in issueInstructionImpl()
84 IS->computeCriticalRegDep(); in issueInstructionImpl()
86 if (IS->isMemOp()) { in issueInstructionImpl()
88 const MemoryGroup &Group = LSU.getGroup(IS->getLSUTokenID()); in issueInstructionImpl()
89 IS->setCriticalMemDep(Group.getCriticalPredecessor()); in issueInstructionImpl()
92 if (IS->isExecuting()) in issueInstructionImpl()
94 else if (IS->isExecuted()) in issueInstructionImpl()
129 Instruction &IS = *IR.getInstruction(); in promoteToReadySet() local
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DScoreboardHazardRecognizer.cpp45 const InstrStage *IS = ItinData->beginStage(idx); in ScoreboardHazardRecognizer() local
49 for (; IS != E; ++IS) { in ScoreboardHazardRecognizer()
50 unsigned StageDepth = CurCycle + IS->getCycles(); in ScoreboardHazardRecognizer()
52 CurCycle += IS->getNextCycles(); in ScoreboardHazardRecognizer()
129 for (const InstrStage *IS = ItinData->beginStage(idx), in getHazardType() local
130 *E = ItinData->endStage(idx); IS != E; ++IS) { in getHazardType()
134 for (unsigned int i = 0; i < IS->getCycles(); ++i) { in getHazardType()
146 InstrStage::FuncUnits freeUnits = IS->getUnits(); in getHazardType()
147 switch (IS->getReservationKind()) { in getHazardType()
166 cycle += IS->getNextCycles(); in getHazardType()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp80 Instruction &IS = *IR.getInstruction(); in dispatch() local
81 const InstrDesc &Desc = IS.getDesc(); in dispatch()
82 const unsigned NumMicroOps = IS.getNumMicroOps(); in dispatch()
98 if (IS.isOptimizableMove()) in dispatch()
99 if (PRF.tryEliminateMoveOrSwap(IS.getDefs(), IS.getUses())) in dispatch()
100 IS.setEliminated(); in dispatch()
111 if (!IS.isEliminated()) { in dispatch()
112 for (ReadState &RS : IS.getUses()) in dispatch()
120 for (WriteState &WS : IS.getDefs()) in dispatch()
126 IS.dispatch(RCUTokenID); in dispatch()
H A DInOrderIssueStage.cpp176 static void addRegisterReadWrite(RegisterFile &PRF, Instruction &IS, in addRegisterReadWrite() argument
180 assert(!IS.isEliminated()); in addRegisterReadWrite()
182 for (ReadState &RS : IS.getUses()) in addRegisterReadWrite()
185 for (WriteState &WS : IS.getDefs()) in addRegisterReadWrite()
223 Instruction &IS = *IR.getInstruction(); in tryIssue() local
225 const InstrDesc &Desc = IS.getDesc(); in tryIssue()
235 IS.dispatch(RCUTokenID); in tryIssue()
238 addRegisterReadWrite(PRF, IS, SourceIndex, STI, UsedRegs); in tryIssue()
240 unsigned NumMicroOps = IS.getNumMicroOps(); in tryIssue()
245 IS.execute(SourceIndex); in tryIssue()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSchedulerRegistry.h63 ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
68 ScheduleDAGSDNodes *createSourceListDAGScheduler(SelectionDAGISel *IS,
75 ScheduleDAGSDNodes *createHybridListDAGScheduler(SelectionDAGISel *IS,
82 ScheduleDAGSDNodes *createILPListDAGScheduler(SelectionDAGISel *IS,
87 ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
93 ScheduleDAGSDNodes *createVLIWDAGScheduler(SelectionDAGISel *IS,
97 ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
102 ScheduleDAGSDNodes *createDAGLinearizer(SelectionDAGISel *IS,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/Native/
H A DNativeExeSymbol.cpp68 auto IS = Session.getPDBFile().getPDBInfoStream(); in getAge() local
69 if (IS) in getAge()
70 return IS->getAge(); in getAge()
71 consumeError(IS.takeError()); in getAge()
80 auto IS = Session.getPDBFile().getPDBInfoStream(); in getGuid() local
81 if (IS) in getGuid()
82 return IS->getGuid(); in getGuid()
83 consumeError(IS.takeError()); in getGuid()
H A DPDBFileBuilder.cpp173 for (const auto &IS : InjectedSources) { in finalizeMsfLayout() local
175 CRC.update(arrayRefFromStringRef(IS.Content->getBuffer())); in finalizeMsfLayout()
180 Entry.FileSize = IS.Content->getBufferSize(); in finalizeMsfLayout()
181 Entry.FileNI = IS.NameIndex; in finalizeMsfLayout()
182 Entry.VFileNI = IS.VNameIndex; in finalizeMsfLayout()
188 StringRef VName = getStringTableBuilder().getStringForId(IS.VNameIndex); in finalizeMsfLayout()
199 for (const auto &IS : InjectedSources) { in finalizeMsfLayout() local
200 SN = allocateNamedStream(IS.StreamName, IS.Content->getBufferSize()); in finalizeMsfLayout()
250 for (const auto &IS : InjectedSources) { in commitInjectedSources() local
251 uint32_t SN = cantFail(getNamedStreamIndex(IS.StreamName)); in commitInjectedSources()
[all …]
H A DNativeFunctionSymbol.cpp59 static bool inlineSiteContainsAddress(InlineSiteSym &IS, in inlineSiteContainsAddress() argument
64 for (auto &Annot : IS.annotations()) { in inlineSiteContainsAddress()
118 InlineSiteSym IS = in findInlineFramesByVA() local
120 if (inlineSiteContainsAddress(IS, CodeOffset)) { in findInlineFramesByVA()
123 IS, getVirtualAddress(), Modi, Start.offset()); in findInlineFramesByVA()
128 End = Syms.at(IS.End); in findInlineFramesByVA()
133 Start = Syms.at(IS.End); in findInlineFramesByVA()
/netbsd-src/external/bsd/atf/dist/tools/
H A Dparser.hpp130 template< class IS >
132 IS& m_is;
154 tokenizer(IS&, bool, const token_type&, const token_type&,
167 template< class IS >
168 tokenizer< IS >::tokenizer(IS& p_is, in tokenizer()
184 template< class IS >
186 tokenizer< IS >::lineno(void) in lineno()
192 template< class IS >
194 tokenizer< IS >::add_delim(char delim, const token_type& type) in add_delim()
200 template< class IS >
[all …]
/netbsd-src/sys/arch/m68k/fpsp/
H A Dstwotox.sa10 * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
234 *--ENTRY POINT FOR 2**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
264 ANDI.L #$3F,D0 ...D0 IS J
267 ASR.L #6,d2 ...d2 IS L, N = 64L + J
269 ASR.L #1,D0 ...D0 IS M
270 SUB.L D0,d2 ...d2 IS M', N = 64(M+M') + J
272 MOVE.W d2,ADJFACT(a6) ...ADJFACT IS 2^(M')
274 *--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
275 *--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
293 FMUL.X LOG2,FP0 ...FP0 IS R
[all …]
H A Dslogn.sa10 * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
350 *--FPCR SAVED AND CLEARED, INPUT IS 2^(ADJK)*FP0, FP0 CONTAINS
360 TST.L D0 ...CHECK IF X IS NEGATIVE
361 BLT.W LOGNEG ...LOG OF NEGATIVE ARGUMENT IS INVALID
362 CMP2.L BOUNDS1,D0 ...X IS POSITIVE, CHECK IF X IS NEAR 1
363 BCC.W LOGNEAR1 ...BOUNDS IS ROUGHLY [15/16, 17/16]
370 *--THE IDEA IS THAT LOG(X) = K*LOG2 + LOG(Y)
372 *--NOTE THAT U = (Y-F)/F IS VERY SMALL AND THUS APPROXIMATING
374 *--ALSO NOTE THAT THE VALUE 1/F IS STORED IN A TABLE SO THAT NO
375 *--DIVISION IS NEEDED TO CALCULATE (Y-F)/F.
[all …]
H A Dsatan.sa10 * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
264 *--ENTRY POINT FOR ATAN(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
284 *--THE IDEA IS ATAN(X) = ATAN(F) + ATAN( [X-F] / [1+XF] ).
285 *--SO IF F IS CHOSEN TO BE CLOSE TO X AND ATAN(F) IS STORED IN
286 *--A TABLE, ALL WE NEED IS TO APPROXIMATE ATAN(U) WHERE
287 *--U = (X-F)/(1+XF) IS SMALL (REMEMBER F IS CLOSE TO X). IT IS
288 *--TRUE THAT A DIVIDE IS NOW NEEDED, BUT THE APPROXIMATION FOR
289 *--ATAN(U) IS A VERY SHORT POLYNOMIAL AND THE INDEXING TO
291 *--DIVIDE. IN THE END THIS METHOD IS MUCH FASTER THAN A TRADITIONAL
299 *--THAT IS IT MATCHES THE EXPONENT AND FIRST 5 BITS OF X, THE
[all …]
H A Dssin.sa10 * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
206 *--SAVE FPCR, FP1. CHECK IF |X| IS TOO SMALL OR LARGE
225 *--THIS IS THE USUAL CASE, |X| <= 15 PI.
226 *--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
234 *--FP1 IS NOW READY
239 ADDA.L D0,A1 ...A1 IS THE ADDRESS OF N*PIBY2
240 * ...WHICH IS IN TWO PIECES Y1 & Y2
244 FSUB.S (A1),FP0 ...FP0 IS R = (X-Y1)-Y2
249 *--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
251 ADD.L ADJN(a6),D0 ...SEE IF D0 IS ODD OR EVEN
[all …]

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