| /netbsd-src/sys/arch/arm/amlogic/ |
| H A D | meson_genfb.c | 68 #define INTERLACE __BIT(0) macro
75 { 5, 1920, 1080, INTERLACE },
76 { 6, 720, 480, DBLSCAN | INTERLACE },
77 { 7, 720, 480, DBLSCAN | INTERLACE },
84 { 20, 1920, 1080, INTERLACE },
89 { 39, 1920, 1080, INTERLACE },
581 prop_dictionary_set_bool(cfg, "interlace", !!(flags & INTERLACE)); in meson_genfb_init()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_optc.c | 56 if (timing->flags.INTERLACE == 1) { in apply_front_porch_workaround()
251 if (patched_crtc_timing.flags.INTERLACE == 1) in optc1_program_timing()
257 if (patched_crtc_timing.flags.INTERLACE == 1) in optc1_program_timing()
330 if (patched_crtc_timing.flags.INTERLACE == 1) { in optc1_set_vtg_params()
541 if (timing->flags.INTERLACE == 1) in optc1_validate_timing()
561 min_v_blank = timing->flags.INTERLACE?optc1->min_v_blank_interlace:optc1->min_v_blank; in optc1_validate_timing()
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| H A D | amdgpu_dcn10_stream_encoder.c | 274 if (hw_crtc_timing.flags.INTERLACE) { in enc1_stream_encoder_dp_set_stream_attribute()
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| H A D | amdgpu_dcn10_hw_sequencer.c | 3097 if (timing->flags.INTERLACE == 1) { in apply_front_porch_workaround()
3118 interlace_factor = patched_crtc_timing.flags.INTERLACE ? 2 : 1; in dcn10_get_vupdate_offset_from_vsync()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 181 uint32_t INTERLACE:1; member
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| H A D | grph_object_ctrl_defs.h | 121 uint32_t INTERLACE:1; member
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | amdgpu_dce110_timing_generator.c | 74 if (timing->flags.INTERLACE == 1) { in dce110_timing_generator_apply_front_porch_workaround()
342 if (patched_crtc_timing.flags.INTERLACE == 1) in dce110_timing_generator_program_timing_generator()
343 bp_params.flags.INTERLACE = 1; in dce110_timing_generator_program_timing_generator()
1142 if (timing->flags.INTERLACE == 1) in dce110_timing_generator_validate_timing()
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| H A D | amdgpu_dce110_timing_generator_v.c | 383 timing->flags.INTERLACE, in dce110_timing_generator_v_program_blanking()
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| H A D | amdgpu_dce110_hw_sequencer.c | 1144 stream->timing.flags.INTERLACE; in build_audio_output()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 649 uint32_t INTERLACE :1; member
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| H A D | dc_types.h | 274 uint32_t INTERLACE :1; member
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
| H A D | amdgpu_command_table2.c | 541 if (bp_params->flags.INTERLACE) { in set_crtc_using_dtd_timing_v3()
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| H A D | amdgpu_command_table.c | 1787 if (bp_params->flags.INTERLACE) { in set_crtc_timing_v1()
1866 if (bp_params->flags.INTERLACE) { in set_crtc_using_dtd_timing_v3()
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| H A D | amdgpu_bios_parser.c | 1284 info->lcd_timing.misc_info.INTERLACE = in get_embedded_panel_info_v1_2()
1402 info->lcd_timing.misc_info.INTERLACE = in get_embedded_panel_info_v1_3()
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| H A D | amdgpu_bios_parser2.c | 921 info->lcd_timing.misc_info.INTERLACE = !!(lvds->lcd_timing.miscinfo & ATOM_INTERLACE); in get_embedded_panel_info_v2_1()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| H A D | amdgpu_dce120_timing_generator.c | 111 uint32_t interlace_factor = timing->flags.INTERLACE ? 2 : 1; in dce120_timing_generator_validate_timing()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | amdgpu_dce_stream_encoder.c | 301 if (hw_crtc_timing.flags.INTERLACE) { in dce110_stream_encoder_dp_set_stream_attribute()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| H A D | amdgpu_dcn_calcs.c | 1197 * (pipe->stream->timing.flags.INTERLACE ? 1 : 0); in dcn_validate_bandwidth()
1203 * (pipe->stream->timing.flags.INTERLACE ? 1 : 0); in dcn_validate_bandwidth()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | amdgpu_dcn20_resource.c | 1956 pipes[pipe_cnt].pipe.dest.interlaced = timing->flags.INTERLACE; in dcn20_populate_dml_pipes_from_context()
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