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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrConv.td78 defm I32_TRUNC_S_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
79 [(set I32:$dst, (fp_to_sint F64:$src))],
83 defm I32_TRUNC_U_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
84 [(set I32:$dst, (fp_to_uint F64:$src))],
88 defm I64_TRUNC_S_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
89 [(set I64:$dst, (fp_to_sint F64:$src))],
93 defm I64_TRUNC_U_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
94 [(set I64:$dst, (fp_to_uint F64:$src))],
102 def : Pat<(fp_to_sint_sat F64:$src, i32), (I32_TRUNC_S_SAT_F64 F64:$src)>;
103 def : Pat<(fp_to_uint_sat F64:$src, i32), (I32_TRUNC_U_SAT_F64 F64:$src)>;
[all …]
H A DWebAssemblyInstrFloat.td20 defm _F64 : I<(outs F64:$dst), (ins F64:$src), (outs), (ins),
21 [(set F64:$dst, (node F64:$src))],
31 defm _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
32 [(set F64:$dst, (node F64:$lhs, F64:$rhs))],
41 defm _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs), (outs), (ins),
42 [(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))],
70 def : Pat<(fcopysign F64:$lhs, F32:$rhs),
71 (COPYSIGN_F64 F64:$lhs, (F64_PROMOTE_F32 F32:$rhs))>;
72 def : Pat<(fcopysign F32:$lhs, F64:$rhs),
73 (COPYSIGN_F32 F32:$lhs, (F32_DEMOTE_F64 F64:$rhs))>;
[all …]
H A DWebAssemblyRuntimeLibcallSignatures.cpp536 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
551 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
555 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
556 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
559 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
563 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
572 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
584 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
606 Rets.push_back(wasm::ValType::F64); in getLibcallSignature()
607 Params.push_back(wasm::ValType::F64); in getLibcallSignature()
[all …]
H A DWebAssemblyInstrInfo.td262 defm "": ARGUMENT<F64, f64>;
340 defm "" : LOCAL<F64, global_op32>;
358 defm CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm),
360 [(set F64:$res, fpimm:$imm)],
H A DWebAssemblyRegisterInfo.td65 def F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>;
H A DWebAssemblyMCInstLower.cpp218 return wasm::ValType::F64; in getType()
H A DWebAssemblyInstrMemory.td67 defm LOAD_F64 : WebAssemblyLoad<F64, "f64.load", 0x2b, []>;
264 defm STORE_F64 : WebAssemblyStore<F64, "f64.store", 0x39>;
H A DWebAssemblyAsmPrinter.cpp119 case wasm::ValType::F64: in getInvokeSig()
/netbsd-src/external/bsd/tre/dist/win32/
H A Dtre.sln6 {69258B5D-ECAE-40E4-8F64-5F063B05C998} = {69258B5D-ECAE-40E4-8F64-5F063B05C998}
9 Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "tre", "tre.vcproj", "{69258B5D-ECAE-40E4-8F64-…
21 {69258B5D-ECAE-40E4-8F64-5F063B05C998}.Debug|Win32.ActiveCfg = Debug|Win32
22 {69258B5D-ECAE-40E4-8F64-5F063B05C998}.Debug|Win32.Build.0 = Debug|Win32
23 {69258B5D-ECAE-40E4-8F64-5F063B05C998}.Release|Win32.ActiveCfg = Release|Win32
24 {69258B5D-ECAE-40E4-8F64-5F063B05C998}.Release|Win32.Build.0 = Release|Win32
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/Utils/
H A DWebAssemblyTypeUtilities.cpp29 return wasm::ValType::F64; in parseType()
53 .Case("f64", WebAssembly::BlockType::F64) in parseBlockType()
136 return wasm::ValType::F64; in toValType()
H A DWebAssemblyTypeUtilities.h32 F64 = unsigned(wasm::ValType::F64), enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td441 def: OpR_R_pat<F2_conv_df2sf, pf1<fpround>, f32, F64>;
454 def: OpR_R_pat<F2_conv_df2w_chop, pf1<fp_to_sint>, i32, F64>;
456 def: OpR_R_pat<F2_conv_df2d_chop, pf1<fp_to_sint>, i64, F64>;
459 def: OpR_R_pat<F2_conv_df2uw_chop, pf1<fp_to_uint>, i32, F64>;
461 def: OpR_R_pat<F2_conv_df2ud_chop, pf1<fp_to_uint>, i64, F64>;
466 def: Pat<(i64 (bitconvert F64:$v)), (I64:$v)>;
467 def: Pat<(f64 (bitconvert I64:$v)), (F64:$v)>;
694 def: OpR_RR_pat<F2_dfcmpeq, seteq, i1, F64>;
695 def: OpR_RR_pat<F2_dfcmpgt, setgt, i1, F64>;
696 def: OpR_RR_pat<F2_dfcmpge, setge, i1, F64>;
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Demangle/
H A DRustDemangle.h47 F64, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Demangle/
H A DRustDemangle.cpp285 Type = BasicType::F64; in parseBasicType()
390 case BasicType::F64: in printBasicType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSISchedule.td32 // Conversion to or from F32 (but not converting F64 to or from F32)
50 // F64 "transcendental" (actually only reciprocal and/or square root)
H A DAMDGPULibCalls.cpp533 getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId()) || in useNative()
698 getArgType(FInfo) == AMDGPULibFunc::F64) in fold()
1236 if (getArgType(FInfo) == AMDGPULibFunc::F64 || !HasNative(FInfo.getId())) in getNativeFunction()
1424 opr0 = (getArgType(FInfo) == AMDGPULibFunc::F64) in evaluateScalarMathFunc()
1430 opr1 = (getArgType(FInfo) == AMDGPULibFunc::F64) in evaluateScalarMathFunc()
1436 opr2 = (getArgType(FInfo) == AMDGPULibFunc::F64) in evaluateScalarMathFunc()
H A DAMDGPULibFunc.cpp628 case 'd': res.ArgType = AMDGPULibFunc::F64; break; in parseItaniumParam()
735 case AMDGPULibFunc::F64: return "d"; in getItaniumTypeName()
884 case AMDGPULibFunc::F64: T = Type::getDoubleTy(C); break; in getIntrinsicParamType()
H A DAMDGPULibFunc.h272 F64 = FLOAT | B64, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DAMDGPUMetadata.h107 F64 = 11, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/BinaryFormat/
H A DWasm.h396 F64 = WASM_TYPE_F64, enumerator
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/
H A DAMDGPUMetadata.cpp87 YIO.enumCase(EN, "F64", ValueType::F64); in enumeration()
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/
H A Dthunderx3t110.md219 ; need to split out latency 23 throughput 23/4: F64 from
441 ; Q/F64: 23/4
/netbsd-src/external/gpl3/gcc/dist/gcc/config/aarch64/
H A Dthunderx3t110.md219 ; need to split out latency 23 throughput 23/4: F64 from
441 ; Q/F64: 23/4
/netbsd-src/external/gpl3/binutils.old/dist/gas/doc/
H A Dc-aarch64.texi177 @tab Enable F64 Matrix Multiply extension. This implies @code{sve}.
233 @tab Enable SME F64 Extension.
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64SchedA57.td467 // ASIMD FP divide, Q-form, F64
475 // ASIMD FP square root, Q-form, F64

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