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Searched refs:Dest0 (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1056 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdst); in mergeRead2Pair() local
1115 .add(*Dest0) // Copy to same destination including flags and sub reg. in mergeRead2Pair()
1251 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeImagePair() local
1255 .add(*Dest0) // Copy to same destination including flags and sub reg. in mergeImagePair()
1301 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::sdst); in mergeSBufferLoadImmPair() local
1305 .add(*Dest0) // Copy to same destination including flags and sub reg. in mergeSBufferLoadImmPair()
1362 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeBufferLoadPair() local
1366 .add(*Dest0) // Copy to same destination including flags and sub reg. in mergeBufferLoadPair()
1428 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeTBufferLoadPair() local
1432 .add(*Dest0) // Copy to same destination including flags and sub reg. in mergeTBufferLoadPair()
H A DSIInstrInfo.cpp5921 MachineOperand &Dest0 = Inst.getOperand(0); in moveToVALU() local
5930 RI.getEquivalentVGPRClass(MRI.getRegClass(Dest0.getReg())); in moveToVALU()
5942 MRI.replaceRegWith(Dest0.getReg(), DestReg); in moveToVALU()
H A DSIISelLowering.cpp3888 MachineOperand &Dest0 = MI.getOperand(0); in EmitInstrWithCustomInserter() local
3896 BuildMI(*BB, MI, DL, TII->get(Opc), Dest0.getReg()).add(Src0).add(Src1); in EmitInstrWithCustomInserter()