| /netbsd-src/external/gpl3/binutils.old/dist/gas/doc/ |
| H A D | c-lm32.texi | 52 Enable instruction cache related CSRs.
56 Enable data cache related CSRs.
64 Enable all instructions and CSRs.
91 LM32 has the following Control and Status Registers (CSRs).
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| /netbsd-src/external/gpl3/binutils/dist/gas/doc/ |
| H A D | c-lm32.texi | 52 Enable instruction cache related CSRs.
56 Enable data cache related CSRs.
64 Enable all instructions and CSRs.
91 LM32 has the following Control and Status Registers (CSRs).
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.td | 316 // the order of CSRs in CSR_iOS.
320 // CSRs that are handled by prologue, epilogue.
323 // CSRs that are handled explicitly via copies.
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 627 void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) { in setCalleeSavedRegs() argument
631 append_range(UpdatedCSRs, CSRs); in setCalleeSavedRegs()
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| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/microblaze/ |
| H A D | divsi3.S | 93 # Restore values of CSRs and that of r3 and the divisor and the dividend
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| H A D | modsi3.S | 92 # Restore values of CSRs and that of r3 and the divisor and the dividend
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| H A D | udivsi3.S | 102 # Restore values of CSRs and that of r3 and the divisor and the dividend
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| H A D | umodsi3.S | 105 # Restore values of CSRs and that of r3 and the divisor and the dividend
|
| H A D | moddi3.S | 110 # Restore values of CSRs and that of r29 and the divisor and the dividend
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| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/microblaze/ |
| H A D | divsi3.S | 93 # Restore values of CSRs and that of r3 and the divisor and the dividend
|
| H A D | umodsi3.S | 105 # Restore values of CSRs and that of r3 and the divisor and the dividend
|
| H A D | modsi3.S | 92 # Restore values of CSRs and that of r3 and the divisor and the dividend
|
| H A D | udivsi3.S | 102 # Restore values of CSRs and that of r3 and the divisor and the dividend
|
| H A D | moddi3.S | 110 # Restore values of CSRs and that of r29 and the divisor and the dividend
|
| /netbsd-src/crypto/external/bsd/openssl.old/dist/ |
| H A D | README | 37 Creation of X.509 certificates, CSRs and CRLs
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVSystemOperands.td | 91 // User Floating-Point CSRs
383 // User Vector CSRs
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 157 const MCPhysReg *CSRs = getCalleeSavedRegs(&MF); in UpdateCustomCalleeSavedRegs() local
159 for (const MCPhysReg *I = CSRs; *I; ++I) in UpdateCustomCalleeSavedRegs()
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| H A D | AArch64CallingConvention.td | 500 // CSRs that are handled by prologue, epilogue.
504 // CSRs that are handled explicitly via copies.
|
| /netbsd-src/crypto/external/bsd/openssl/dist/ |
| H A D | README.md | 48 - creation of X.509 certificates, CSRs and CRLs
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallingConv.td | 150 // The CSRs & scratch-registers are interleaved at a split boundary of 8.
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 244 void setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs);
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| /netbsd-src/crypto/external/bsd/openssl.old/dist/doc/man1/ |
| H A D | openssl.pod | 30 o Creation of X.509 certificates, CSRs and CRLs
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.td | 1113 // CSRs that are handled by prologue, epilogue.
1116 // CSRs that are handled explicitly via copies.
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| /netbsd-src/crypto/external/bsd/openssl/dist/doc/man1/ |
| H A D | openssl.pod | 28 o Creation of X.509 certificates, CSRs and CRLs
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| /netbsd-src/crypto/external/bsd/heimdal/dist/doc/ |
| H A D | hx509.texi | 456 @c section which explains CSRs as well?
|