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Searched refs:Bit2 (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/
H A DX86FoldTablesEmitter.cpp219 BitInit *Bit2 = cast<BitInit>(B2->getBit(i)); in equalBitsInits() local
220 if (Bit1->getValue() != Bit2->getValue()) in equalBitsInits()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp362 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()() local
369 return Bit2 < W2; in operator ()()
371 if (W2 <= Bit2) in operator ()()
374 const BitTracker::BitValue &V1 = RC1[Bit1], V2 = RC2[Bit2]; in operator ()()
/netbsd-src/sys/external/bsd/acpica/dist/tests/misc/
H A Dgrammar.asl4740 // (BYT1) Bit1 ->0 and (BYT2)Bit2 -> 0 condition
4748 // (BYT1) Bit1 ->1 and (BYT2)Bit2 -> 1 condition
4756 // (BYT1) Bit1 ->1 and (BYT)Bit2 -> 0 condition
4764 //(BYT1) Bit1 ->0 and (BYT2)Bit2 -> 1 condition
4802 // (WRD1) Bit1 ->0 and (WRD2)Bit2 -> 0 condition
4809 // (WRD1) Bit1 ->1 and (WRD2)Bit2 -> 1 condition
4816 // (WRD1) Bit1 ->1 and (WRD2)Bit2 -> 0 condition
4823 //(WRD1) Bit1 ->0 and (WRD2)Bit2 -> 1 condition
4857 // (DWD1) Bit1 ->0 and (DWD2)Bit2 -> 0 condition
4864 // (DWD1) Bit1 ->1 and (DWD2)Bit2 -> 1 condition
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