| /netbsd-src/sys/lib/libkern/arch/hppa/ |
| H A D | prefix.h | 39 BL .+8,r1\
45 BL .+8,r1\
51 BL .+8,r1\
57 BL .+8,r1\
76 #define MILLI_BLE(lbl) BL lbl,r31
77 #define MILLI_BLEN(lbl) BL,n lbl,r31
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| /netbsd-src/crypto/external/bsd/heimdal/dist/lib/asn1/ |
| H A D | asn1-common.h | 58 #define ASN1_MALLOC_ENCODE(T, B, BL, S, L, R) \ argument
60 (BL) = length_##T((S)); \
61 (B) = malloc((BL)); \
65 (R) = encode_##T(((unsigned char*)(B)) + (BL) - 1, (BL), \
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64SLSHardening.cpp | 289 BLOpcode = AArch64::BL; in ConvertBLRToBL()
337 MachineInstr *BL = BuildMI(MBB, MBBI, DL, TII->get(BLOpcode)).addSym(Sym); in ConvertBLRToBL() local
349 for (unsigned OpIdx = BL->getNumExplicitOperands(); in ConvertBLRToBL()
350 OpIdx < BL->getNumOperands(); OpIdx++) { in ConvertBLRToBL()
351 MachineOperand Op = BL->getOperand(OpIdx); in ConvertBLRToBL()
363 BL->RemoveOperand(FirstOpIdxToRemove); in ConvertBLRToBL()
364 BL->RemoveOperand(SecondOpIdxToRemove); in ConvertBLRToBL()
366 BL->copyImplicitOps(MF, BLR); in ConvertBLRToBL()
367 MF.moveCallSiteInfo(&BLR, BL); in ConvertBLRToBL()
369 BL->addOperand(MachineOperand::CreateReg(Reg, false /*isDef*/, true /*isImp*/, in ConvertBLRToBL()
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| H A D | AArch64LowerHomogeneousPrologEpilog.cpp | 463 BuildMI(MBB, MBBI, DL, TII->get(AArch64::BL)) in lowerEpilog()
533 BuildMI(MBB, MBBI, DL, TII->get(AArch64::BL)) in lowerProlog()
545 BuildMI(MBB, MBBI, DL, TII->get(AArch64::BL)) in lowerProlog()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/ |
| H A D | UDTLayout.cpp | 208 auto BL = std::make_unique<BaseClassLayout>(*this, Offset, false, in initializeChildren() local
211 AllBases.push_back(BL.get()); in initializeChildren()
212 addChildToLayout(std::move(BL)); in initializeChildren()
252 auto BL = in initializeChildren() local
254 AllBases.push_back(BL.get()); in initializeChildren()
259 addChildToLayout(std::move(BL)); in initializeChildren()
270 for (BaseClassLayout *BL : AllBases) { in hasVBPtrAtOffset()
271 if (BL->hasVBPtrAtOffset(Off - BL->getOffsetInParent())) in hasVBPtrAtOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMSLSHardening.cpp | 294 MachineInstr *BL = in ConvertIndirectCallToIndirectJump() local
299 : BuildMI(MBB, MBBI, DL, TII->get(ARM::BL)).addGlobalAddress(GV); in ConvertIndirectCallToIndirectJump()
311 for (unsigned OpIdx = BL->getNumExplicitOperands(); in ConvertIndirectCallToIndirectJump()
312 OpIdx < BL->getNumOperands(); OpIdx++) { in ConvertIndirectCallToIndirectJump()
313 MachineOperand Op = BL->getOperand(OpIdx); in ConvertIndirectCallToIndirectJump()
325 BL->RemoveOperand(FirstOpIdxToRemove); in ConvertIndirectCallToIndirectJump()
326 BL->RemoveOperand(SecondOpIdxToRemove); in ConvertIndirectCallToIndirectJump()
328 BL->copyImplicitOps(MF, IndirectCall); in ConvertIndirectCallToIndirectJump()
329 MF.moveCallSiteInfo(&IndirectCall, BL); in ConvertIndirectCallToIndirectJump()
332 BL->addOperand(MachineOperand::CreateReg(Reg, false /*isDef*/, true /*isImp*/, in ConvertIndirectCallToIndirectJump()
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| /netbsd-src/games/tetris/ |
| H A D | shapes.c | 51 #define BL B_COLS-1 /* bottom left */ macro
60 /* 4*/ { 4, 12, { ML, BL, MR, } },
63 /* 7*/ { 7, 0, { TC, ML, BL, } },
73 /*17*/ { 5, 5, { TC, BC, BL, } },
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| /netbsd-src/external/bsd/pcc/dist/pcc/arch/i86/ |
| H A D | macdefs.h | 167 #define BL 016 macro
203 { BL, BH, AXBX, DXBX, CXBX, BXSI, BXDI, -1 },\
224 { AX, AL, AH, BX, BL, BH, AXDX, AXCX, AXSI, /* axbx */\
232 { DX, DL, DH, BX, BL, BH, AXDX, DXCX, DXSI, /* dxbx */\
238 { CX, CL, CH, BX, BL, BH, AXCX, DXCX, CXSI, /* cxbx */\
244 { BX, BL, BH, SI, AXBX, DXBX, CXBX, BXDI, /* bxsi */\
246 { BX, BL, BH, DI, AXBX, DXBX, CXBX, BXSI, /* bxdi */\
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| /netbsd-src/external/bsd/pcc/dist/pcc/arch/i386/ |
| H A D | macdefs.h | 184 #define BL 016 macro
220 { BL, BH, EAXEBX, EDXEBX, ECXEBX, EBXESI, EBXEDI, -1 },\
241 { EAX, AL, AH, EBX, BL, BH, EAXEDX, EAXECX, EAXESI, /* eaxebx */\
249 { EDX, DL, DH, EBX, BL, BH, EAXEDX, EDXECX, EDXESI, /* edxebx */\
255 { ECX, CL, CH, EBX, BL, BH, EAXECX, EDXECX, ECXESI, /* ecxebx */\
261 { EBX, BL, BH, ESI, EAXEBX, EDXEBX, ECXEBX, EBXEDI, /* ebxesi */\
263 { EBX, BL, BH, EDI, EAXEBX, EDXEBX, ECXEBX, EBXESI, /* ebxedi */\
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| /netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | mcore-opc.h | 26 OMa, SI, I7, LS, BR, BL, LR, LJ, enumerator
92 { "loopt", BL, 0, 0x0400 },
|
| /netbsd-src/external/gpl3/binutils/dist/opcodes/ |
| H A D | mcore-opc.h | 26 OMa, SI, I7, LS, BR, BL, LR, LJ, enumerator
92 { "loopt", BL, 0, 0x0400 },
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/ |
| H A D | README-interworking | 57 * Normal function calls can just use the BL instruction. The
242 pointer), the compiler generates a BL instruction to do this. The
243 Thumb version of the BL instruction has the special property of
246 return the instruction after the BL instruction, in Thumb mode.
248 The BL instruction does not change modes itself however, so if an ARM
252 into the BL instruction. If the BL instruction is an ARM style BL
255 mode to Thumb mode, puts the address of this stub into the BL
257 stub. Similarly if the BL instruction is a Thumb BL instruction, and
260 stub into the BL instruction, and the address of the referenced
311 The BL instruction ensures that the correct return address is stored
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/ |
| H A D | README-interworking | 57 * Normal function calls can just use the BL instruction. The
242 pointer), the compiler generates a BL instruction to do this. The
243 Thumb version of the BL instruction has the special property of
246 return the instruction after the BL instruction, in Thumb mode.
248 The BL instruction does not change modes itself however, so if an ARM
252 into the BL instruction. If the BL instruction is an ARM style BL
255 mode to Thumb mode, puts the address of this stub into the BL
257 stub. Similarly if the BL instruction is a Thumb BL instruction, and
260 stub into the BL instruction, and the address of the referenced
311 The BL instruction ensures that the correct return address is stored
[all …]
|
| /netbsd-src/external/gpl3/gdb.old/dist/libdecnumber/bid/ |
| H A D | bid2dpd_dpd2bid.c | 288 UINT64 exp, BL, d109; in _bid_to_dpd128() local
308 BL = bcoeff.w[0] - BH.w[0] * 1000000000000000000ull; in _bid_to_dpd128()
313 __mul_64x64_to_128 (BT2, BL, d109); in _bid_to_dpd128()
315 BLL32 = (unsigned int) BL - BLH32 * 1000000000; in _bid_to_dpd128()
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| /netbsd-src/external/gpl3/gcc.old/dist/libdecnumber/bid/ |
| H A D | bid2dpd_dpd2bid.c | 290 UINT64 exp, BL, d109; in _bid_to_dpd128() local
324 BL = bcoeff.w[0] - BH.w[0] * 1000000000000000000ull; in _bid_to_dpd128()
329 __mul_64x64_to_128 (BT2, BL, d109); in _bid_to_dpd128()
331 BLL32 = (unsigned int) BL - BLH32 * 1000000000; in _bid_to_dpd128()
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| /netbsd-src/external/gpl3/gdb/dist/libdecnumber/bid/ |
| H A D | bid2dpd_dpd2bid.c | 288 UINT64 exp, BL, d109; in _bid_to_dpd128() local
308 BL = bcoeff.w[0] - BH.w[0] * 1000000000000000000ull; in _bid_to_dpd128()
313 __mul_64x64_to_128 (BT2, BL, d109); in _bid_to_dpd128()
315 BLL32 = (unsigned int) BL - BLH32 * 1000000000; in _bid_to_dpd128()
|
| /netbsd-src/external/gpl3/gcc/dist/libdecnumber/bid/ |
| H A D | bid2dpd_dpd2bid.c | 290 UINT64 exp, BL, d109; in _bid_to_dpd128() local
324 BL = bcoeff.w[0] - BH.w[0] * 1000000000000000000ull; in _bid_to_dpd128()
329 __mul_64x64_to_128 (BT2, BL, d109); in _bid_to_dpd128()
331 BLL32 = (unsigned int) BL - BLH32 * 1000000000; in _bid_to_dpd128()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 90 {codeview::RegisterId::BL, X86::BL}, in initLLVMToSEHAndCVRegMapping()
633 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
645 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
646 return X86::BL; in getX86SubSuperRegisterOrZero()
682 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
718 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
754 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero()
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| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/sh/ |
| H A D | crt1.S | 223 ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
233 ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
239 ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
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| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/sh/ |
| H A D | crt1.S | 223 ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
233 ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
239 ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work.
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/m32r/ |
| H A D | ChangeLog-2021 | 102 * bl24.cgs: Test long BL instruction.
103 * bl8.cgs: Test short BL instruction.
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| /netbsd-src/sys/arch/i386/include/ |
| H A D | bioscall.h | 68 #define BL r_bx.biosreg_quarter[BIOSREG_LO] macro
|
| /netbsd-src/external/bsd/unbound/dist/pythonmod/doc/ |
| H A D | usecase.rst | 20 .. _DNS-BL: http://www.dnsbl.org
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.h | 34 BL, enumerator
|
| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-objcopy/MachO/ |
| H A D | MachOLayoutBuilder.cpp | 76 BL = B->isLocalSymbol(); in updateDySymTab() local
77 if (AL != BL) in updateDySymTab()
|