| /netbsd-src/external/apache2/llvm/dist/llvm/lib/DebugInfo/PDB/DIA/ |
| H A D | DIASession.cpp | 162 DWORD ArgSection, ArgOffset = 0; in addressForVA() local 163 if (S_OK == Session->addressForVA(VA, &ArgSection, &ArgOffset)) { in addressForVA() 165 Offset = static_cast<uint32_t>(ArgOffset); in addressForVA() 173 DWORD ArgSection, ArgOffset = 0; in addressForRVA() local 174 if (S_OK == Session->addressForRVA(RVA, &ArgSection, &ArgOffset)) { in addressForRVA() 176 Offset = static_cast<uint32_t>(ArgOffset); in addressForRVA()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 1552 int ArgOffset) { in getShadowPtrForArgument() 1554 if (ArgOffset) in getShadowPtrForArgument() 1555 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset)); in getShadowPtrForArgument() 1562 int ArgOffset) { in getOriginPtrForArgument() 1566 if (ArgOffset) in getOriginPtrForArgument() 1567 Base = IRB.CreateAdd(Base, ConstantInt::get(MS.IntptrTy, ArgOffset)); in getOriginPtrForArgument() 1677 unsigned ArgOffset = 0; in getShadow() local 1694 bool Overflow = ArgOffset + Size > kParamTLSSize; in getShadow() 1700 Value *Base = getShadowPtrForArgument(&FArg, EntryIRB, ArgOffset); in getShadow() 1726 Value *Base = getShadowPtrForArgument(&FArg, EntryIRB, ArgOffset); in getShadow() [all …]
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| H A D | DataFlowSanitizer.cpp | 611 Value *getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB); 1727 Value *DFSanFunction::getArgTLS(Type *T, unsigned ArgOffset, IRBuilder<> &IRB) { in getArgTLS() argument 1729 if (ArgOffset) in getArgTLS() 1730 Base = IRB.CreateAdd(Base, ConstantInt::get(DFS.IntptrTy, ArgOffset)); in getArgTLS() 1790 unsigned ArgOffset = 0; in getShadowForTLSArgument() local 1801 ArgOffset += alignTo(Size, ShadowTLSAlignment); in getShadowForTLSArgument() 1802 if (ArgOffset > ArgTLSSize) in getShadowForTLSArgument() 1807 if (ArgOffset + Size > ArgTLSSize) in getShadowForTLSArgument() 1812 Value *ArgShadowPtr = getArgTLS(FArg.getType(), ArgOffset, IRB); in getShadowForTLSArgument() 3208 unsigned ArgOffset = 0; in visitCallBase() local [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 522 uint64_t ArgOffset = alignTo(ExplicitArgOffset, ABIAlign) + BaseOffset; in lowerFormalArgumentsKernel() local 530 Align Alignment = commonAlignment(KernArgBaseAlign, ArgOffset); in lowerFormalArgumentsKernel() 538 lowerParameterPtr(VRegs[i][0], B, ArgTy, ArgOffset); in lowerFormalArgumentsKernel() 542 lowerParameterPtr(PtrReg, B, ArgTy, ArgOffset); in lowerFormalArgumentsKernel() 553 lowerParameter(B, ArgTy, ArgOffset, Alignment, ArgReg); in lowerFormalArgumentsKernel()
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| H A D | AMDGPULegalizerInfo.cpp | 4016 unsigned ArgOffset, in packImage16bitOpsToDwords() argument 4024 MachineOperand &SrcOp = MI.getOperand(ArgOffset + I); in packImage16bitOpsToDwords() 4047 !MI.getOperand(ArgOffset + I + 1).isReg()) { in packImage16bitOpsToDwords() 4054 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords() 4117 const unsigned ArgOffset = NumDefs + 1; in legalizeImageIntrinsic() local 4135 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic() 4137 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic() 4143 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm(); in legalizeImageIntrinsic() 4170 MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask); in legalizeImageIntrinsic() 4198 if (mi_match(MI.getOperand(ArgOffset + Intr->LodIndex).getReg(), *MRI, in legalizeImageIntrinsic() [all …]
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| H A D | AMDGPUInstructionSelector.cpp | 1480 const unsigned ArgOffset = MI.getNumExplicitDefs() + 1; in selectImageIntrinsic() local 1491 Unorm = MI.getOperand(ArgOffset + Intr->UnormIndex).getImm() != 0; in selectImageIntrinsic() 1496 if (!parseTexFail(MI.getOperand(ArgOffset + Intr->TexFailCtrlIndex).getImm(), in selectImageIntrinsic() 1500 const int Flags = MI.getOperand(ArgOffset + Intr->NumArgs).getImm(); in selectImageIntrinsic() 1531 DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm(); in selectImageIntrinsic() 1562 const MachineOperand &Lod = MI.getOperand(ArgOffset + Intr->LodIndex); in selectImageIntrinsic() 1571 const MachineOperand &Lod = MI.getOperand(ArgOffset + Intr->MipIndex); in selectImageIntrinsic() 1589 unsigned CPol = MI.getOperand(ArgOffset + Intr->CachePolicyIndex).getImm(); in selectImageIntrinsic() 1599 MachineOperand &AddrOp = MI.getOperand(ArgOffset + I); in selectImageIntrinsic() 1665 MachineOperand &SrcOp = MI.getOperand(ArgOffset + Intr->VAddrStart + I); in selectImageIntrinsic() [all …]
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| H A D | SIISelLowering.cpp | 1725 unsigned ArgOffset = VA.getLocMemOffset(); in lowerStackParameter() local 1728 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, true); in lowerStackParameter() 5984 const unsigned ArgOffset = WithChain ? 2 : 1; in lowerImage() local 6009 cast<ConstantSDNode>(Op.getOperand(ArgOffset + Intr->DMaskIndex)); in lowerImage() 6055 unsigned VAddrEnd = ArgOffset + Intr->VAddrEnd; in lowerImage() 6061 Op.getOperand(ArgOffset + Intr->LodIndex))) { in lowerImage() 6072 Op.getOperand(ArgOffset + Intr->MipIndex))) { in lowerImage() 6082 VAddrs.push_back(Op.getOperand(ArgOffset + I)); in lowerImage() 6086 Op.getOperand(ArgOffset + Intr->GradientStart).getSimpleValueType(); in lowerImage() 6091 VAddrVT = Op.getOperand(ArgOffset + Intr->CoordStart).getSimpleValueType(); in lowerImage() [all …]
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| H A D | AMDGPUISelLowering.cpp | 1034 uint64_t ArgOffset = alignTo(ExplicitArgOffset, Alignment) + ExplicitOffset; in analyzeFormalArgumentsCompute() local 1046 ComputeValueVTs(*this, DL, BaseArgTy, ValueVTs, &Offsets, ArgOffset); in analyzeFormalArgumentsCompute() 4194 uint64_t ArgOffset = alignTo(MFI->getExplicitKernArgSize(), Alignment) + in getImplicitParameterOffset() local 4198 return ArgOffset; in getImplicitParameterOffset() 4200 return ArgOffset + 4; in getImplicitParameterOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3874 unsigned ParamAreaSize, unsigned &ArgOffset, in CalculateStackSlotUsed() argument 3882 ArgOffset = alignTo(ArgOffset, Alignment); in CalculateStackSlotUsed() 3885 if (ArgOffset >= LinkageSize + ParamAreaSize) in CalculateStackSlotUsed() 3889 ArgOffset += CalculateStackSlotSize(ArgVT, Flags, PtrByteSize); in CalculateStackSlotUsed() 3891 ArgOffset = ((ArgOffset + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; in CalculateStackSlotUsed() 3894 if (ArgOffset > LinkageSize + ParamAreaSize) in CalculateStackSlotUsed() 4074 unsigned ArgOffset = VA.getLocMemOffset(); in LowerFormalArguments_32SVR4() local 4076 ArgOffset += ArgSize - ObjSize; in LowerFormalArguments_32SVR4() 4077 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, isImmutable); in LowerFormalArguments_32SVR4() 4266 unsigned ArgOffset = LinkageSize; in LowerFormalArguments_64SVR4() local [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 539 unsigned ArgOffset = CCInfo.getNextStackOffset(); in LowerFormalArguments_32() local 541 ArgOffset += StackOffset; in LowerFormalArguments_32() 543 assert(!ArgOffset); in LowerFormalArguments_32() 544 ArgOffset = 68+4*NumAllocated; in LowerFormalArguments_32() 548 FuncInfo->setVarArgsFrameOffset(ArgOffset); in LowerFormalArguments_32() 557 int FrameIdx = MF.getFrameInfo().CreateFixedObject(4, ArgOffset, in LowerFormalArguments_32() 563 ArgOffset += 4; in LowerFormalArguments_32() 658 unsigned ArgOffset = CCInfo.getNextStackOffset(); in LowerFormalArguments_64() local 661 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgArea + in LowerFormalArguments_64() 668 for (; ArgOffset < 6*8; ArgOffset += 8) { in LowerFormalArguments_64() [all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 883 unsigned InRegsParamRecordIdx, int ArgOffset, 888 unsigned ArgOffset, unsigned TotalArgRegsSaveSize,
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| H A D | ARMISelLowering.cpp | 4142 int ArgOffset, unsigned ArgSize) const { in StoreByValRegs() argument 4167 ArgOffset = -4 * (ARM::R4 - RBegin); in StoreByValRegs() 4170 int FrameIndex = MFI.CreateFixedObject(ArgSize, ArgOffset, false); in StoreByValRegs() 4194 unsigned ArgOffset, in VarArgStyleRegisters() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZFrameLowering.cpp | 335 int64_t ArgOffset = MFFrame.getObjectOffset(I) + in processFunctionBeforeFrameFinalized() local 337 MaxArgOffset = std::max(MaxArgOffset, ArgOffset); in processFunctionBeforeFrameFinalized()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 498 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments() local 501 FuncInfo->setVarArgsFrameOffset(ArgOffset + ArgsBaseOffset); in LowerFormalArguments()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 18186 int ArgOffset; in combineInsertEltToShuffle() local 18188 std::tie(ArgOffset, ArgVal) = ArgWorkList.pop_back_val(); in combineInsertEltToShuffle() 18191 ElementOffset = ArgOffset; in combineInsertEltToShuffle() 18198 ArgOffset + ArgVal.getValueType().getVectorNumElements(); in combineInsertEltToShuffle() 18207 assert(CurrentArgOffset == ArgOffset); in combineInsertEltToShuffle()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4938 unsigned ArgOffset = VA.getLocMemOffset(); in LowerFormalArguments() local 4948 int FI = MFI.CreateFixedObject(ArgSize, ArgOffset + BEAlign, true); in LowerFormalArguments()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 34373 size_t ArgOffset = MFI->getPreallocatedArgOffsets(PreallocatedId)[ArgIdx]; in EmitInstrWithCustomInserter() local 34375 << ", arg offset " << ArgOffset << "\n"); in EmitInstrWithCustomInserter() 34379 X86::ESP, false, ArgOffset); in EmitInstrWithCustomInserter()
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