| /netbsd-src/sys/arch/hppa/hppa/ |
| H A D | in_cksum.c | 68 #define ADDCARRY {if (sum > 0xffff) sum -= 0xffff;} macro 69 #define REDUCE {sum = (sum & 0xffff) + (sum >> 16); ADDCARRY}
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| /netbsd-src/sys/arch/sparc/sparc/ |
| H A D | cpu_in_cksum.c | 194 #define ADDCARRY {if (sum > 0xffff) sum -= 0xffff;} macro 282 ADDCARRY; in cpu_in_cksum()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 283 ADDCARRY, enumerator
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 100 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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| H A D | SystemZISelLowering.cpp | 186 setOperationAction(ISD::ADDCARRY, VT, Custom); in SystemZTargetLowering() 3708 while (Carry.getOpcode() == ISD::ADDCARRY) in isAddCarryChain() 3740 case ISD::ADDCARRY: in lowerADDSUBCARRY() 3744 BaseOp = SystemZISD::ADDCARRY; in lowerADDSUBCARRY() 5418 case ISD::ADDCARRY: in LowerOperation() 5605 OPCODE(ADDCARRY); in getTargetNodeName()
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| H A D | SystemZOperators.td | 286 def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 161 case ISD::ADDCARRY: in PromoteIntegerResult() 1531 case ISD::ADDCARRY: in PromoteIntegerOperand() 2163 case ISD::ADDCARRY: in ExpandIntegerResult() 2564 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_ADDSUB() 2571 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB() 2736 CarryOp = ISD::ADDCARRY; in ExpandIntRes_UADDSUBO() 2812 unsigned CarryOp = N->getOpcode() == ISD::SADDO_CARRY ? ISD::ADDCARRY in ExpandIntRes_SADDSUBO_CARRY() 2942 ISD::ADDCARRY, TLI.getTypeToExpandTo(*DAG.getContext(), NVT)); in ExpandIntRes_ABS() 2950 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Hi, Sign, Lo.getValue(1)); in ExpandIntRes_ABS()
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| H A D | SelectionDAGDumper.cpp | 299 case ISD::ADDCARRY: return "addcarry"; in getOperationName()
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| H A D | DAGCombiner.cpp | 1622 case ISD::ADDCARRY: return visitADDCARRY(N); in visit() 2598 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY && in getAsCarry() 2699 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1)) && in visitADDLikeCommutative() 2701 return DAG.getNode(ISD::ADDCARRY, DL, N1->getVTList(), in visitADDLikeCommutative() 2705 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT)) in visitADDLikeCommutative() 2707 return DAG.getNode(ISD::ADDCARRY, DL, in visitADDLikeCommutative() 2840 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1))) { in visitUADDOLike() 2844 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0, Y, in visitUADDOLike() 2849 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT)) in visitUADDOLike() 2851 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0, in visitUADDOLike() [all …]
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| H A D | LegalizeDAG.cpp | 3407 case ISD::ADDCARRY: in ExpandNode() 3413 bool IsAdd = Node->getOpcode() == ISD::ADDCARRY; in ExpandNode()
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| H A D | TargetLowering.cpp | 6400 Next = DAG.getNode(ISD::ADDCARRY, dl, DAG.getVTList(VT, BoolType), Next, in expandMUL_LOHI() 6414 Hi = DAG.getNode(ISD::ADDCARRY, dl, DAG.getVTList(HiLoVT, BoolType), Hi, in expandMUL_LOHI() 8310 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in expandUADDSUBO()
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| H A D | SelectionDAG.cpp | 3344 case ISD::ADDCARRY: in computeKnownBits() 3364 else if (Opcode == ISD::ADDCARRY) in computeKnownBits()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 737 case ISD::ADDCARRY: in Select() 1087 unsigned Opc = N->getOpcode() == ISD::ADDCARRY ? AMDGPU::V_ADDC_U32_e64 in SelectAddcSubb() 1094 unsigned Opc = N->getOpcode() == ISD::ADDCARRY ? AMDGPU::S_ADD_CO_PSEUDO in SelectAddcSubb() 1110 if ((IsAdd && (UI->getOpcode() != ISD::ADDCARRY)) || in SelectUADDO_USUBO()
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| H A D | AMDGPUISelLowering.cpp | 1846 SDValue Add1_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Lo, in LowerUDIVREM64() 1848 SDValue Add1_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Hi, in LowerUDIVREM64() 1861 SDValue Add2_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_Lo, in LowerUDIVREM64() 1863 SDValue Add2_HiC = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_HiNc, in LowerUDIVREM64() 1865 SDValue Add2_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add2_HiC, in LowerUDIVREM64()
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| H A D | SIISelLowering.cpp | 231 setOperationAction(ISD::ADDCARRY, MVT::i32, Legal); in SITargetLowering() 239 setOperationAction(ISD::ADDCARRY, MVT::i64, Legal); in SITargetLowering() 798 setTargetDAGCombine(ISD::ADDCARRY); in SITargetLowering() 10396 Opc == ISD::ANY_EXTEND || Opc == ISD::ADDCARRY) in performAddCombine() 10412 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY; in performAddCombine() 10415 case ISD::ADDCARRY: { in performAddCombine() 10420 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), RHS->getVTList(), Args); in performAddCombine() 10453 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::ADDCARRY : ISD::SUBCARRY; in performSubCombine() 10486 if ((LHSOpc == ISD::ADD && Opc == ISD::ADDCARRY) || in performAddCarrySubCarryCombine() 10839 case ISD::ADDCARRY: in PerformDAGCombine()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1556 setOperationAction(ISD::ADDCARRY, VT, Expand); in HexagonTargetLowering() 1559 setOperationAction(ISD::ADDCARRY, MVT::i64, Custom); in HexagonTargetLowering() 3076 if (Opc == ISD::ADDCARRY) in LowerAddSubCarry() 3149 case ISD::ADDCARRY: in LowerOperation()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 782 setOperationAction(ISD::ADDCARRY, VT, Expand); in initActions()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1103 setOperationAction(ISD::ADDCARRY, MVT::i32, Custom); in ARMTargetLowering() 9252 if (Op.getOpcode() == ISD::ADDCARRY) { in LowerADDSUBCARRY() 9908 case ISD::ADDCARRY: in LowerOperation() 16832 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine() 18959 if (!isOperationLegalOrCustom(ISD::ADDCARRY, HalfT) || in lowerABS() 18975 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Tmp, Hi, in lowerABS()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 594 case ISD::ADDCARRY: in IsProfitableToFold()
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| H A D | X86ISelLowering.cpp | 1956 setOperationAction(ISD::ADDCARRY, VT, Custom); in X86TargetLowering() 29857 bool IsAdd = Opc == ISD::ADDCARRY || Opc == ISD::SADDO_CARRY; in LowerADDSUBCARRY() 30375 case ISD::ADDCARRY: in LowerOperation()
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