Home
last modified time | relevance | path

Searched refs:Operands (Results 1 – 25 of 102) sorted by relevance

12345

/minix3/external/bsd/llvm/dist/llvm/utils/TableGen/
H A DFastISelEmitter.cpp118 SmallVector<OpKind, 3> Operands; member
121 return Operands < O.Operands; in operator <()
124 return Operands == O.Operands; in operator ==()
127 bool empty() const { return Operands.empty(); } in empty()
130 for (unsigned i = 0, e = Operands.size(); i != e; ++i) in hasAnyImmediateCodes()
131 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) in hasAnyImmediateCodes()
140 for (unsigned i = 0, e = Operands.size(); i != e; ++i) in getWithoutImmCodes()
141 if (!Operands[i].isImm()) in getWithoutImmCodes()
142 Result.Operands.push_back(Operands[i]); in getWithoutImmCodes()
144 Result.Operands.push_back(OpKind::getImm(0)); in getWithoutImmCodes()
[all …]
H A DPseudoLoweringEmitter.cpp93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) in addDagOperandMapping()
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
101 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I) in addDagOperandMapping()
103 OpsAdded += Insn.Operands[i].MINumOperands; in addDagOperandMapping()
146 if (Insn.Operands.size() != Dag->getNumArgs()) in evaluateExpansion()
151 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) in evaluateExpansion()
152 NumMIOperands += Insn.Operands[i].MINumOperands; in evaluateExpansion()
170 for (unsigned i = 0, e = SourceInsn.Operands.size(); i != e; ++i) in evaluateExpansion()
171 SourceOperands[SourceInsn.Operands[i].Name] = i; in evaluateExpansion()
174 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) { in evaluateExpansion()
[all …]
H A DAsmWriterInst.cpp163 Operands.push_back(AsmWriterOperand("PrintSpecial", in AsmWriterInst()
169 unsigned OpNo = CGI.Operands.getOperandNamed(VarName); in AsmWriterInst()
170 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; in AsmWriterInst()
173 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, in AsmWriterInst()
180 Operands.push_back(AsmWriterOperand("return;", in AsmWriterInst()
189 if (Operands.size() != Other.Operands.size()) return ~1; in MatchesAllButOneOp()
192 for (unsigned i = 0, e = Operands.size(); i != e; ++i) { in MatchesAllButOneOp()
193 if (Operands[i] != Other.Operands[i]) { in MatchesAllButOneOp()
H A DInstrInfoEmitter.cpp64 std::map<std::string, unsigned> &Operands,
91 for (auto &Op : Inst.Operands) { in GetOperandInfo()
204 std::map<std::string, unsigned> &Operands, in initOperandMapData() argument
212 for (const auto &Info : Inst->Operands) { in initOperandMapData()
213 StrUintMapIter I = Operands.find(Info.Name); in initOperandMapData()
215 if (I == Operands.end()) { in initOperandMapData()
216 I = Operands.insert(Operands.begin(), in initOperandMapData()
244 std::map<std::string, unsigned> Operands; in emitOperandNameMappings() local
247 initOperandMapData(NumberedInstructions, Namespace, Operands, OperandMap); in emitOperandNameMappings()
255 for (const auto &Op : Operands) in emitOperandNameMappings()
[all …]
H A DAsmWriterInst.h87 std::vector<AsmWriterOperand> Operands;
102 if (!Operands.empty() && in AddLiteralString()
103 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand) in AddLiteralString()
104 Operands.back().Str.append(Str); in AddLiteralString()
106 Operands.push_back(AsmWriterOperand(Str)); in AddLiteralString()
H A DCodeEmitterGen.cpp88 if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { in AddCodeToMergeInOperand()
90 OpIdx = CGI.Operands[OpIdx].MIOperandNo; in AddCodeToMergeInOperand()
91 assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && in AddCodeToMergeInOperand()
94 unsigned NumberOps = CGI.Operands.size(); in AddCodeToMergeInOperand()
98 (CGI.Operands.isFlatOperandNotEmitted(NumberedOp) || in AddCodeToMergeInOperand()
100 CGI.Operands.getSubOperandNumber(NumberedOp).first)))) { in AddCodeToMergeInOperand()
103 if (NumberedOp >= CGI.Operands.back().MIOperandNo + in AddCodeToMergeInOperand()
104 CGI.Operands.back().MINumOperands) { in AddCodeToMergeInOperand()
117 std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx); in AddCodeToMergeInOperand()
118 std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName; in AddCodeToMergeInOperand()
[all …]
H A DAsmWriterEmitter.cpp115 for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) { in EmitInstructions()
118 O << " " << FirstInst.Operands[i].getCode(); in EmitInstructions()
126 FirstInst.Operands[i])); in EmitInstructions()
132 AWI.Operands[i])); in EmitInstructions()
163 if (Inst->Operands.empty()) in FindUniqueOperandCommands()
166 Command = " " + Inst->Operands[0].getCode() + "\n"; in FindUniqueOperandCommands()
205 if (!FirstInst || FirstInst->Operands.size() == Op) in FindUniqueOperandCommands()
220 if (!OtherInst || OtherInst->Operands.size() == Op || in FindUniqueOperandCommands()
221 OtherInst->Operands[Op] != FirstInst->Operands[Op]) { in FindUniqueOperandCommands()
230 std::string Command = " " + FirstInst->Operands[Op].getCode() + "\n"; in FindUniqueOperandCommands()
[all …]
H A DFixedLenDecoderEmitter.cpp315 const std::map<unsigned, std::vector<OperandInfo> > &Operands; member in __anon7d7e680d0711::FilterChooser
345 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(), in FilterChooser()
356 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), in FilterChooser()
553 Owner->Operands, BitValueArray, *Owner))); in recurse()
580 Owner->Operands, BitValueArray, *Owner))); in recurse()
1063 for (const auto &Op : Operands.find(Opc)->second) { in emitDecoder()
1665 std::map<unsigned, std::vector<OperandInfo> > &Operands){ in populateInstruction()
1681 Operands[Opc] = InsnOperands; in populateInstruction()
1703 for (unsigned i = 0; i < CGI.Operands.size(); ++i) { in populateInstruction()
1704 int tiedTo = CGI.Operands[i].getTiedRegister(); in populateInstruction()
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp316 OperandMatchResultTy parseRegister(OperandVector &Operands,
324 OperandMatchResultTy parseAddress(OperandVector &Operands,
328 bool parseOperand(OperandVector &Operands, StringRef Mnemonic);
345 SMLoc NameLoc, OperandVector &Operands) override;
347 OperandVector &Operands, MCStreamer &Out,
352 OperandMatchResultTy parseGR32(OperandVector &Operands) { in parseGR32() argument
353 return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, GR32Reg); in parseGR32()
355 OperandMatchResultTy parseGRH32(OperandVector &Operands) { in parseGRH32() argument
356 return parseRegister(Operands, RegGR, SystemZMC::GRH32Regs, GRH32Reg); in parseGRH32()
358 OperandMatchResultTy parseGRX32(OperandVector &Operands) { in parseGRX32() argument
[all …]
/minix3/external/bsd/llvm/dist/llvm/include/llvm/MC/
H A DMCInst.h153 SmallVector<MCOperand, 8> Operands;
163 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
164 MCOperand &getOperand(unsigned i) { return Operands[i]; }
165 unsigned getNumOperands() const { return Operands.size(); }
168 Operands.push_back(Op);
171 void clear() { Operands.clear(); }
172 size_t size() { return Operands.size(); }
176 iterator begin() { return Operands.begin(); }
177 const_iterator begin() const { return Operands.begin(); }
178 iterator end() { return Operands.end(); }
[all …]
H A DMCTargetAsmParser.h147 SMLoc NameLoc, OperandVector &Operands) = 0;
172 OperandVector &Operands, MCStreamer &Out,
195 const OperandVector &Operands) = 0;
/minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/AsmParser/
H A DAMDGPUAsmParser.cpp57 OperandVector &Operands, MCStreamer &Out,
61 OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Mnemonic);
63 SMLoc NameLoc, OperandVector &Operands) override;
66 OperandMatchResultTy parseSWaitCntOps(OperandVector &Operands);
159 OperandVector &Operands, in MatchAndEmitInstruction() argument
165 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm)) { in MatchAndEmitInstruction()
176 if (ErrorInfo >= Operands.size()) in MatchAndEmitInstruction()
191 AMDGPUAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) { in parseOperand() argument
194 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic); in parseOperand()
206 Operands.push_back(AMDGPUOperand::CreateImm(IntVal)); in parseOperand()
[all …]
/minix3/external/bsd/llvm/dist/llvm/include/llvm/Analysis/
H A DScalarEvolutionExpressions.h140 const SCEV *const *Operands;
145 : SCEV(ID, T), Operands(O), NumOperands(N) {} in SCEVNAryExpr()
151 return Operands[i]; in getOperand()
156 op_iterator op_begin() const { return Operands; } in op_begin()
157 op_iterator op_end() const { return Operands + NumOperands; } in op_end()
298 const SCEV *getStart() const { return Operands[0]; } in getStart()
671 SmallVector<const SCEV *, 2> Operands; in visitAddExpr() local
673 Operands.push_back(visit(Expr->getOperand(i))); in visitAddExpr()
674 return SE.getAddExpr(Operands); in visitAddExpr()
678 SmallVector<const SCEV *, 2> Operands; in visitMulExpr() local
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp57 bool parseSysAlias(StringRef Name, SMLoc NameLoc, OperandVector &Operands);
59 bool parseCondCode(OperandVector &Operands, bool invertCondCode);
63 bool parseRegister(OperandVector &Operands);
65 bool parseVectorList(OperandVector &Operands);
66 bool parseOperand(OperandVector &Operands, bool isCondCode,
86 OperandVector &Operands, MCStreamer &Out,
97 OperandMatchResultTy tryParseOptionalShiftExtend(OperandVector &Operands);
98 OperandMatchResultTy tryParseBarrierOperand(OperandVector &Operands);
99 OperandMatchResultTy tryParseMRSSystemRegister(OperandVector &Operands);
100 OperandMatchResultTy tryParseSysReg(OperandVector &Operands);
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp692 void EmitInstruction(MCInst &Inst, OperandVector &Operands, MCStreamer &Out);
695 OperandVector &Operands, MCStreamer &Out,
699 void MatchFPUWaitAlias(SMLoc IDLoc, X86Operand &Op, OperandVector &Operands,
706 OperandVector &Operands, MCStreamer &Out,
711 OperandVector &Operands, MCStreamer &Out,
725 bool HandleAVX512Operand(OperandVector &Operands,
784 SMLoc NameLoc, OperandVector &Operands) override;
1714 bool X86AsmParser::HandleAVX512Operand(OperandVector &Operands, in HandleAVX512Operand() argument
1748 Operands.push_back(X86Operand::CreateToken(BroadcastPrimitive, in HandleAVX512Operand()
1755 Operands.push_back(X86Operand::CreateToken("{", consumedToken)); in HandleAVX512Operand()
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp192 bool validatetLDMRegList(MCInst Inst, const OperandVector &Operands,
194 bool validatetSTMRegList(MCInst Inst, const OperandVector &Operands,
331 bool shouldOmitCCOutOperand(StringRef Mnemonic, OperandVector &Operands);
332 bool shouldOmitPredicateOperand(StringRef Mnemonic, OperandVector &Operands);
365 SMLoc NameLoc, OperandVector &Operands) override;
373 OperandVector &Operands, MCStreamer &Out,
3045 int ARMAsmParser::tryParseShiftRegister(OperandVector &Operands) { in tryParseShiftRegister() argument
3071 (ARMOperand *)Operands.pop_back_val().release()); in tryParseShiftRegister()
3131 Operands.push_back(ARMOperand::CreateShiftedRegister(ShiftTy, SrcReg, in tryParseShiftRegister()
3135 Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm, in tryParseShiftRegister()
[all …]
/minix3/minix/drivers/power/acpi/dispatcher/
H A Ddsopcode.c377 WalkState->Operands[0], WalkState->Operands[1], in AcpiDsEvalBufferFieldOperands()
378 WalkState->Operands[2], WalkState->Operands[3]); in AcpiDsEvalBufferFieldOperands()
385 WalkState->Operands[0], WalkState->Operands[1], in AcpiDsEvalBufferFieldOperands()
386 NULL, WalkState->Operands[2]); in AcpiDsEvalBufferFieldOperands()
463 OperandDesc = WalkState->Operands[WalkState->NumOperands - 1]; in AcpiDsEvalRegionOperands()
472 OperandDesc = WalkState->Operands[WalkState->NumOperands - 2]; in AcpiDsEvalRegionOperands()
554 Operand = &WalkState->Operands[0]; in AcpiDsEvalTableRegionOperands()
642 &(WalkState->Operands [WalkState->NumOperands -1]), in AcpiDsEvalDataObjectOperands()
651 ArgDesc = WalkState->Operands [WalkState->NumOperands - 1]; in AcpiDsEvalDataObjectOperands()
766 Status = AcpiExResolveToValue (&WalkState->Operands[0], WalkState); in AcpiDsEvalBankFieldOperands()
[all …]
H A Ddswexec.c125 Status = AcpiExResolveToValue (&WalkState->Operands [0], WalkState); in AcpiDsGetPredicateValue()
131 ObjDesc = WalkState->Operands [0]; in AcpiDsGetPredicateValue()
459 &(WalkState->Operands [WalkState->NumOperands -1]), in AcpiDsExecEndOp()
480 (WalkState->Operands[0]->Common.Type == ACPI_TYPE_LOCAL_REFERENCE) && in AcpiDsExecEndOp()
481 (WalkState->Operands[1]->Common.Type == ACPI_TYPE_LOCAL_REFERENCE) && in AcpiDsExecEndOp()
482 (WalkState->Operands[0]->Reference.Class == in AcpiDsExecEndOp()
483 WalkState->Operands[1]->Reference.Class) && in AcpiDsExecEndOp()
484 (WalkState->Operands[0]->Reference.Value == in AcpiDsExecEndOp()
485 WalkState->Operands[1]->Reference.Value)) in AcpiDsExecEndOp()
619 WalkState->Operands[0] = (void *) Op->Common.Parent->Common.Node; in AcpiDsExecEndOp()
H A Ddscontrol.c279 Status = AcpiExResolveToValue (&WalkState->Operands [0], WalkState); in AcpiDsExecEndControlOp()
290 WalkState->ReturnDesc = WalkState->Operands[0]; in AcpiDsExecEndControlOp()
327 AcpiUtRemoveReference (WalkState->Operands [0]); in AcpiDsExecEndControlOp()
330 WalkState->Operands [0] = NULL; in AcpiDsExecEndControlOp()
/minix3/external/bsd/llvm/dist/llvm/lib/Analysis/
H A DScalarEvolutionNormalization.cpp109 SmallVector<const SCEV *, 8> Operands; in TransformImpl() local
116 Operands.push_back(TransformSubExpr(*I, LUser, nullptr)); in TransformImpl()
119 const SCEV *Result = SE.getAddRecExpr(Operands, L, SCEV::FlagAnyWrap); in TransformImpl()
191 SmallVector<const SCEV *, 8> Operands; in TransformImpl() local
199 Operands.push_back(N); in TransformImpl()
204 case scAddExpr: return SE.getAddExpr(Operands); in TransformImpl()
205 case scMulExpr: return SE.getMulExpr(Operands); in TransformImpl()
206 case scSMaxExpr: return SE.getSMaxExpr(Operands); in TransformImpl()
207 case scUMaxExpr: return SE.getUMaxExpr(Operands); in TransformImpl()
/minix3/external/bsd/llvm/dist/llvm/lib/IR/
H A DConstantsContext.h342 ArrayRef<Constant *> Operands;
343 ConstantAggrKeyType(ArrayRef<Constant *> Operands) : Operands(Operands) {}
344 ConstantAggrKeyType(ArrayRef<Constant *> Operands, const ConstantClass *)
345 : Operands(Operands) {}
351 Operands = Storage;
355 return Operands == X.Operands;
358 if (Operands.size() != C->getNumOperands())
360 for (unsigned I = 0, E = Operands.size(); I != E; ++I)
361 if (Operands[I] != C->getOperand(I))
366 return hash_combine_range(Operands.begin(), Operands.end());
[all …]
/minix3/minix/drivers/power/acpi/executer/
H A Dexcreate.c82 AliasNode = (ACPI_NAMESPACE_NODE *) WalkState->Operands[0]; in AcpiExCreateAlias()
83 TargetNode = (ACPI_NAMESPACE_NODE *) WalkState->Operands[1]; in AcpiExCreateAlias()
203 Status = AcpiNsAttachObject ((ACPI_NAMESPACE_NODE *) WalkState->Operands[0], in AcpiExCreateEvent()
260 ObjDesc->Mutex.SyncLevel = (UINT8) WalkState->Operands[1]->Integer.Value; in AcpiExCreateMutex()
261 ObjDesc->Mutex.Node = (ACPI_NAMESPACE_NODE *) WalkState->Operands[0]; in AcpiExCreateMutex()
401 ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0]; in AcpiExCreateProcessor()
453 ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0]; in AcpiExCreatePowerResource()
507 ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0]; in AcpiExCreateMethod()
/minix3/external/bsd/llvm/dist/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp50 OperandVector &Operands, MCStreamer &Out,
55 SMLoc NameLoc, OperandVector &Operands) override;
62 OperandMatchResultTy parseMEMOperand(OperandVector &Operands);
64 OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Name);
70 OperandMatchResultTy parseBranchModifiers(OperandVector &Operands);
387 OperandVector &Operands, in MatchAndEmitInstruction() argument
393 unsigned MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo, in MatchAndEmitInstruction()
409 if (ErrorInfo >= Operands.size()) in MatchAndEmitInstruction()
412 ErrorLoc = ((SparcOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction()
449 OperandVector &Operands) { in ParseInstruction() argument
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp114 OperandVector &Operands, MCStreamer &Out,
121 bool parseParenSuffix(StringRef Name, OperandVector &Operands);
123 bool parseBracketSuffix(StringRef Name, OperandVector &Operands);
126 SMLoc NameLoc, OperandVector &Operands) override;
130 MipsAsmParser::OperandMatchResultTy parseMemOperand(OperandVector &Operands);
133 matchAnyRegisterNameWithoutDollar(OperandVector &Operands,
137 matchAnyRegisterWithoutDollar(OperandVector &Operands, SMLoc S);
139 MipsAsmParser::OperandMatchResultTy parseAnyRegister(OperandVector &Operands);
141 MipsAsmParser::OperandMatchResultTy parseImm(OperandVector &Operands);
143 MipsAsmParser::OperandMatchResultTy parseJumpTarget(OperandVector &Operands);
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Transforms/IPO/
H A DArgumentPromotion.cpp472 IndicesVector Operands; in isSafeToPromoteArgument() local
475 Operands.clear(); in isSafeToPromoteArgument()
481 Operands.push_back(0); in isSafeToPromoteArgument()
498 Operands.push_back(C->getSExtValue()); in isSafeToPromoteArgument()
518 if (!PrefixIn(Operands, SafeToUnconditionallyLoad)) in isSafeToPromoteArgument()
524 if (ToPromote.find(Operands) == ToPromote.end()) { in isSafeToPromoteArgument()
533 ToPromote.insert(std::move(Operands)); in isSafeToPromoteArgument()
953 IndicesVector Operands; in DoPromotion() local
954 Operands.reserve(GEP->getNumIndices()); in DoPromotion()
957 Operands.push_back(cast<ConstantInt>(*II)->getSExtValue()); in DoPromotion()
[all …]

12345