| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.cpp | 100 unsigned FramePtr) in replaceFI() argument
106 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false); in replaceFI()
126 .addReg(FramePtr); in replaceFI()
144 .addReg(FramePtr); in replaceFI()
167 unsigned FramePtr = SP::I6; in eliminateFrameIndex() local
170 FramePtr = SP::O6; in eliminateFrameIndex()
183 .addReg(FramePtr).addImm(0).addReg(SrcEvenReg); in eliminateFrameIndex()
184 replaceFI(MF, II, *StMI, dl, 0, Offset, FramePtr); in eliminateFrameIndex()
195 .addReg(FramePtr).addImm(0); in eliminateFrameIndex()
196 replaceFI(MF, II, *StMI, dl, 1, Offset, FramePtr); in eliminateFrameIndex()
[all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 107 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
163 if (Reg == FramePtr) in emitPrologue()
243 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue()
249 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset)); in emitPrologue()
256 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue()
348 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local
377 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue()
385 .addReg(FramePtr)); in emitEpilogue()
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| H A D | ARMBaseRegisterInfo.cpp | 52 FramePtr = ARM::R7; in ARMBaseRegisterInfo()
54 FramePtr = ARM::R11; in ARMBaseRegisterInfo()
56 FramePtr = ARM::R11; in ARMBaseRegisterInfo()
58 FramePtr = STI.isThumb() ? ARM::R7 : ARM::R11; in ARMBaseRegisterInfo()
133 Reserved.set(FramePtr); in getReservedRegs()
353 if (!MRI->canReserveReg(FramePtr)) in canRealignStack()
397 return FramePtr; in getFrameRegister()
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| H A D | ARMFrameLowering.cpp | 298 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
355 if (Reg == FramePtr) in emitPrologue()
510 dl, TII, FramePtr, ARM::SP, in emitPrologue()
515 nullptr, MRI->getDwarfRegNum(FramePtr, true), in emitPrologue()
523 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue()
749 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local
785 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue()
797 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue()
807 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitEpilogue()
811 .addReg(FramePtr)); in emitEpilogue()
[all …]
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| H A D | ARMBaseRegisterInfo.h | 88 unsigned FramePtr; variable
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| H A D | ARMAsmPrinter.cpp | 1103 unsigned FramePtr = RegInfo->getFrameRegister(MF); in EmitUnwindingInstruction() local
1208 if (DstReg == FramePtr && FramePtr != ARM::SP) in EmitUnwindingInstruction()
1211 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction()
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| H A D | ARMExpandPseudoInsts.cpp | 869 unsigned FramePtr = RI.getFrameRegister(MF); in ExpandMI() local
875 FramePtr, -NumBytes, ARMCC::AL, 0, *TII); in ExpandMI()
878 FramePtr, -NumBytes, *TII, RI); in ExpandMI()
881 FramePtr, -NumBytes, ARMCC::AL, 0, in ExpandMI()
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| H A D | ARMFastISel.cpp | 2496 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); in SelectIntrinsicCall() local
2497 unsigned SrcReg = FramePtr; in SelectIntrinsicCall()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 73 FramePtr = (Subtarget.isTarget64BitLP64() || Subtarget.isTargetNaCl64()) ? in X86RegisterInfo()
78 FramePtr = X86::EBP; in X86RegisterInfo()
433 if (!MRI->canReserveReg(FramePtr)) in canRealignStack()
482 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex()
484 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex()
488 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex()
512 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex()
535 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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| H A D | X86RegisterInfo.h | 50 unsigned FramePtr; variable
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| H A D | X86FrameLowering.cpp | 549 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
551 getX86SubSuperRegister(FramePtr, MVT::i64, false) : FramePtr; in emitPrologue()
678 .addImm(FramePtr) in emitPrologue()
684 TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), FramePtr) in emitPrologue()
847 .addImm(FramePtr) in emitPrologue()
899 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitPrologue()
943 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local
945 getX86SubSuperRegister(FramePtr, MVT::i64, false) : FramePtr; in emitEpilogue()
1034 FramePtr, false, -CSSize); in emitEpilogue()
1039 .addReg(FramePtr); in emitEpilogue()
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| H A D | X86ISelLowering.cpp | 21297 unsigned FramePtr = RegInfo->getFrameRegister(*MF); in emitEHSjLjSetJmp() local
21301 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitEHSjLjSetJmp()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.h | 29 unsigned FramePtr) const;
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| H A D | AArch64FrameLowering.cpp | 157 unsigned FramePtr) const { in emitCalleeSavedFrameMoves()
190 if (HasFP && (FramePtr == Reg || Reg == AArch64::LR)) { in emitCalleeSavedFrameMoves()
313 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local
383 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true); in emitPrologue()
414 emitCalleeSavedFrameMoves(MBB, MBBI, FramePtr); in emitPrologue()
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| H A D | AArch64FastISel.cpp | 3329 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); in fastLowerIntrinsicCall() local
3332 TII.get(TargetOpcode::COPY), SrcReg).addReg(FramePtr); in fastLowerIntrinsicCall()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable
152 FramePtr)); in GetSpillList()
307 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0); in emitPrologue()
310 MRI->getDwarfRegNum(FramePtr, true)); in emitPrologue()
380 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr); in emitEpilogue()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | SjLjEHPrepare.cpp | 405 Value *FramePtr = Builder.CreateConstGEP2_32(JBufPtr, 0, 0, "jbuf_fp_gep"); in setupEntryBlockAndCallSites() local
408 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true); in setupEntryBlockAndCallSites()
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