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/llvm-project/clang/test/CodeGen/
H A Dasm-goto.c39 int test3(int out1, int out2) { in test3() argument
44 …asm volatile goto("testl %0, %0; jne %l3;" : "=r"(out1), "=r"(out2) : "r"(out1) :: label_true, loo… in test3()
45 …asm volatile goto("testl %0, %0; jne %l4;" : "=r"(out1), "=r"(out2) : "r"(out1) :: label_true, loo… in test3()
56 int test4(int out1, int out2) { in test4() argument
61 if (out1 < out2) in test4()
62 asm volatile goto("jne %l5" : "+S"(out1), "+D"(out2) : "r"(out1) :: label_true, loop); in test4()
64 … asm volatile goto("jne %l7" : "+S"(out1), "+D"(out2) : "r"(out1), "r"(out2) :: label_true, loop); in test4()
68 return out1 + out2; in test4()
93 int test6(int out1) { in test6() argument
100 …asm volatile goto("testl %0, %0; testl %1, %1; jne %l3" : "+S"(out2) : "r"(out1) :: label_true, la… in test6()
[all …]
H A Dvoidptr-vaarg.c312 void multiple_int(__builtin_va_list list, int *out0, int *out1, int *out2) { in multiple_int()
314 *out1 = __builtin_va_arg(list, int); in multiple_int()
358 one_short_t *out1, int *out2, double *out3) { in increasing_alignment()
360 *out1 = __builtin_va_arg(list, one_short_t); in increasing_alignment()
403 void decreasing_alignment(__builtin_va_list list, double *out0, int *out1, in decreasing_alignment()
406 *out1 = __builtin_va_arg(list, int); in decreasing_alignment()
311 multiple_int(__builtin_va_list list,int * out0,int * out1,int * out2) multiple_int() argument
357 increasing_alignment(__builtin_va_list list,one_char_t * out0,one_short_t * out1,int * out2,double * out3) increasing_alignment() argument
402 decreasing_alignment(__builtin_va_list list,double * out0,int * out1,one_short_t * out2,one_char_t * out3) decreasing_alignment() argument
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Ddefault-fp-mode.ll6 define amdgpu_kernel void @test_default_si(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #0 {
8 store double 0.0, ptr addrspace(1) %out1
15 define amdgpu_kernel void @test_default_vi(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #1 {
17 store double 0.0, ptr addrspace(1) %out1
24 define amdgpu_kernel void @test_f64_denormals(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #2 {
26 store double 0.0, ptr addrspace(1) %out1
33 define amdgpu_kernel void @test_f32_denormals(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #3 {
35 store double 0.0, ptr addrspace(1) %out1
42 define amdgpu_kernel void @test_f32_f64_denormals(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #…
44 store double 0.0, ptr addrspace(1) %out1
[all …]
H A Dhsa-fp-mode.ll7 define amdgpu_kernel void @test_default_ci(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #0 {
9 store double 0.0, ptr addrspace(1) %out1
17 define amdgpu_kernel void @test_default_vi(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #1 {
19 store double 0.0, ptr addrspace(1) %out1
27 define amdgpu_kernel void @test_f64_denormals(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #2 {
29 store double 0.0, ptr addrspace(1) %out1
37 define amdgpu_kernel void @test_f32_denormals(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #3 {
39 store double 0.0, ptr addrspace(1) %out1
47 define amdgpu_kernel void @test_f32_f64_denormals(ptr addrspace(1) %out0, ptr addrspace(1) %out1) #…
49 store double 0.0, ptr addrspace(1) %out1
[all …]
H A Dschedule-global-loads.ll13 define amdgpu_kernel void @cluster_global_arg_loads(ptr addrspace(1) %out0, ptr addrspace(1) %out1,…
18 store i32 %load1, ptr addrspace(1) %out1, align 4
29 %out1 = getelementptr i32, ptr addrspace(1) %out, i32 %offset
31 %tmp1 = load i32, ptr addrspace(1) %out1
H A Dextract_vector_elt-i8.ll74 %out1 = getelementptr i8, ptr addrspace(1) %out, i32 1
76 store volatile i8 %p0, ptr addrspace(1) %out1
122 %out1 = getelementptr i8, ptr addrspace(1) %out, i32 1
124 store volatile i8 %p0, ptr addrspace(1) %out1
170 %out1 = getelementptr i8, ptr addrspace(1) %out, i32 1
172 store volatile i8 %p0, ptr addrspace(1) %out1
255 %out1 = getelementptr i8, ptr addrspace(1) %out, i32 1
257 store volatile i8 %p0, ptr addrspace(1) %out1
340 %out1 = getelementptr i8, ptr addrspace(1) %out, i32 1
342 store volatile i8 %p0, ptr addrspace(1) %out1
[all...]
H A Dwmma-gfx12-w32-swmmac-index_key.ll4 define amdgpu_ps void @test_swmmac_f32_16x16x32_f16_index_key(<8 x half> %A, <16 x half> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
30 store <8 x float> %res1, ptr addrspace(1) %out1
34 define amdgpu_ps void @test_swmmac_f32_16x16x32_bf16_index_key(<8 x i16> %A, <16 x i16> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
60 store <8 x float> %res1, ptr addrspace(1) %out1
64 define amdgpu_ps void @test_swmmac_f16_16x16x32_f16_index_key(<8 x half> %A, <16 x half> %B, <8 x half> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
84 store <8 x half> %res1, ptr addrspace(1) %out1
88 define amdgpu_ps void @test_swmmac_bf16_16x16x32_bf16_index_key(<8 x i16> %A, <16 x i16> %B, <8 x i16> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
108 store <8 x i16> %res1, ptr addrspace(1) %out1
112 define amdgpu_ps void @test_swmmac_i32_16x16x32_iu8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
138 store <8 x i32> %res1, ptr addrspace(1) %out1
[all...]
/llvm-project/llvm/test/Analysis/CostModel/X86/
H A Dinterleaved-store-i16-stride-2.ll
H A Dinterleaved-store-i8-stride-2.ll
H A Dinterleaved-store-i64-stride-2.ll
H A Dinterleaved-store-i32-stride-2.ll
H A Dinterleaved-store-f32-stride-2.ll
H A Dinterleaved-store-f64-stride-2.ll
/llvm-project/libcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/
H A Dranges_partition_copy.pass.cpp131 std::array<int, N2> out1; in test_one() local
135 Iter(begin), Sent(Iter(end)), OutIter1(out1.data()), OutIter2(out2.data()), pred); in test_one()
138 assert(base(result.out1) == out1.data() + expected_true.size()); in test_one()
141 assert(std::ranges::equal(out1, expected_true)); in test_one()
147 std::array<int, N2> out1; in test_one() local
151 range, OutIter1(out1.data()), OutIter2(out2.data()), pred); in test_one()
154 assert(base(result.out1) == out1.data() + expected_true.size()); in test_one()
157 assert(std::ranges::equal(out1, expected_true)); in test_one()
240 std::array<int, 3> out1, out2; in test() local
241 std::ranges::partition_copy(in.begin(), in.end(), out1.begin(), out2.begin(), is_negative); in test()
[all …]
/llvm-project/llvm/test/CodeGen/Thumb2/
H A Dmve-vmull.ll12 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
15 %out = mul <2 x i64> %out1, %out2
27 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
30 %out = mul <2 x i64> %out1, %out2
42 %out1 = zext <2 x i32> %shuf1 to <2 x i64>
45 %out = mul <2 x i64> %out1, %out2
57 %out1 = zext <2 x i32> %shuf1 to <2 x i64>
60 %out = mul <2 x i64> %out1, %out2
72 %out1 = sext <4 x i16> %shuf1 to <4 x i32>
75 %out = mul <4 x i32> %out1, %out2
[all …]
H A Dmve-vmull-splat.ll13 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
17 %out = mul <2 x i64> %out1, %out2
30 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
34 %out = mul <2 x i64> %out2, %out1
59 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
63 %out = mul <2 x i64> %out1, %shuf2
88 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
92 %out = mul <2 x i64> %shuf2, %out1
105 %out1 = sext <2 x i32> %shuf1 to <2 x i64>
109 %out = mul <2 x i64> %out1, %out2
[all …]
/llvm-project/libcxx/test/std/input.output/syncstream/osyncstream/
H A Dassign.pass.cpp39 OS out1{&base1, Allocator{42}}; in test() local
40 assert(out1.get_wrapped() == &base1); in test()
42 typename OS::syncbuf_type* sb1 = out1.rdbuf(); in test()
46 out1 << CharT('A'); in test()
48 static_assert(!noexcept(out1.operator=(std::move(out1)))); // LWG-3867 in test()
57 out2 = std::move(out1); in test()
73 assert(out1.get_wrapped() == nullptr); in test()
/llvm-project/polly/lib/External/isl/
H A Disl_multi_product_templ.c27 isl_size in1, in2, out1, out2; in MULTI() local
32 out1 = FN(MULTI(BASE),dim)(multi1, isl_dim_out); in MULTI()
34 if (in1 < 0 || in2 < 0 || out1 < 0 || out2 < 0) in MULTI()
41 for (i = 0; i < out1; ++i) { in MULTI()
52 res = FN(FN(MULTI(BASE),set),BASE)(res, out1 + i, el); in MULTI()
/llvm-project/clang/test/SemaOpenCL/
H A Dbuiltins-amdgcn-gfx11.cl7 void test(global uint* out1, global ulong* out2, int x) {
8 …*out1 = __builtin_amdgcn_s_sendmsg_rtn(0); // GFX10-error {{'__builtin_amdgcn_s_sendmsg_rtn' needs…
11 …*out1 = __builtin_amdgcn_s_sendmsg_rtn(x); // GFX11-error {{argument to '__builtin_amdgcn_s_sendms…
17 …*out1 = __builtin_amdgcn_permlane64(x); // GFX10-error {{'__builtin_amdgcn_permlane64' needs targe…
/llvm-project/lld/test/COFF/
H A Dout.test4 # RUN: cp %t.obj %T/out/out1.obj
9 # RUN: rm -f out1.exe out2.exe out3.exe out3.dll out4.exe
10 # RUN: lld-link /entry:main %T/out/out1.obj
15 # RUN: llvm-readobj out1.exe | FileCheck %s
/llvm-project/lld/test/ELF/linkerscript/
H A Ddefault-script.s17 # RUN: ld.lld --default-script def.t b.t a.o -o out1
18 # RUN: llvm-readelf -Ss out1 | FileCheck %s --check-prefix=CHECK1
19 # RUN: ld.lld -dT def.t b.t a.o -o out1a && cmp out1 out1a
21 # RUN: ld.lld -dT a.t -dT def.t b.t a.o -o out1a && cmp out1 out1a
24 # RUN: ld.lld -L d -dT default.t b.t a.o -o out1a && cmp out1 out1a
/llvm-project/libcxx/include/__algorithm/
H A Din_out_out_result.h32 _LIBCPP_NO_UNIQUE_ADDRESS _OutIter1 out1; member
39 return {in, out1, out2}; in in_out_out_result()
46 return {std::move(in), std::move(out1), std::move(out2)}; in in_out_out_result()
/llvm-project/llvm/test/TableGen/
H A DGlobalISelEmitter-multiple-output-discard.td
/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dwmma-gfx12-w32-swmmac-index_key.ll4 define amdgpu_ps void @test_swmmac_f32_16x16x32_f16_index_key(<8 x half> %A, <16 x half> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
30 store <8 x float> %res1, ptr addrspace(1) %out1
34 define amdgpu_ps void @test_swmmac_f32_16x16x32_bf16_index_key(<8 x i16> %A, <16 x i16> %B, <8 x float> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
60 store <8 x float> %res1, ptr addrspace(1) %out1
64 define amdgpu_ps void @test_swmmac_f16_16x16x32_f16_index_key(<8 x half> %A, <16 x half> %B, <8 x half> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
84 store <8 x half> %res1, ptr addrspace(1) %out1
88 define amdgpu_ps void @test_swmmac_bf16_16x16x32_bf16_index_key(<8 x i16> %A, <16 x i16> %B, <8 x i16> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
108 store <8 x i16> %res1, ptr addrspace(1) %out1
112 define amdgpu_ps void @test_swmmac_i32_16x16x32_iu8_index_key(<2 x i32> %A, <4 x i32> %B, <8 x i32> %C, ptr addrspace(1) %IndexVecPtr, ptr addrspace(1) %out0, ptr addrspace(1) %out1) {
138 store <8 x i32> %res1, ptr addrspace(1) %out1
[all...]
/llvm-project/libcxx/test/std/algorithms/algorithms.results/
H A Din_out_out_result.pass.cpp72 assert(res.out1 == 0.); in test()
76 assert(res2.out1.content == 0.); in test()
91 auto [in, out1, out2] = std::ranges::in_out_out_result<int, int, int>{1, 2, 3}; in test()
93 assert(out1 == 2); in test()

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