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/freebsd-src/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve.td32 def "": Intrinsic<Vector, (args Vector:$a, Vector:$b),
33 (bitcast (bitop (bitcast $a, UVector), (bitcast $b, UVector)), Vector)>;
37 def "": Intrinsic<Vector, (args Vector:$a, Vector:$b),
38 (bitcast (bitop (bitcast $a, UVector), (not (bitcast $b, UVector))), Vector)>;
42 def vqaddq: Intrinsic<Vector, (args Vector:$a, Vector:$b),
43 (IRIntBase<"sadd_sat", [Vector]> $a, $b)>;
44 def vqsubq: Intrinsic<Vector, (args Vector:$a, Vector:$b),
45 (IRIntBase<"ssub_sat", [Vector]> $a, $b)>;
47 def vqaddq_n: Intrinsic<Vector, (args Vector:$a, unpromoted<Scalar>:$b),
48 (IRIntBase<"sadd_sat", [Vector]> $a, (splat $b))>;
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H A Darm_cde.td123 def vcx1q : CDEIntrinsic<Vector, (args imm_coproc:$cp, imm_12b:$imm),
128 CDEIntrinsic<Vector, (args imm_coproc:$cp, Vector:$acc, imm_12b:$imm),
130 Vector)>;
133 CDEIntrinsic<Vector, (args imm_coproc:$cp, Vector:$n, imm_7b:$imm),
135 Vector)>;
137 CDEIntrinsic<v16u8, (args imm_coproc:$cp, Vector:$n, imm_7b:$imm),
141 CDEIntrinsic<Vector,
142 (args imm_coproc:$cp, Vector:$acc, v16u8:$n, imm_7b:$imm),
144 Vector)>;
147 CDEIntrinsic<Vector,
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H A Driscv_vector.td311 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy)
312 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, VL)
314 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Mask, VL, Policy)
315 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, VL)
317 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, Mask, VL, Policy)
318 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, Stride, VL)
320 Masked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, Mask, VL, Policy)
321 Unmasked: (Vector0, ..., Vector{NF - 1}, Ptr, Index, VL)
323 The Vector(s) is poison when the policy behavior allows us to not care
687 // 7. Vector Load
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DBlotMapVector.h29 VectorTy Vector; variable
34 assert(Vector.size() >= Map.size()); // May differ due to blotting. in ~BlotMapVector()
37 assert(I->second < Vector.size()); in ~BlotMapVector()
38 assert(Vector[I->second].first == I->first); in ~BlotMapVector()
40 for (typename VectorTy::const_iterator I = Vector.begin(), E = Vector.end(); in ~BlotMapVector()
43 Map[I->first] == size_t(I - Vector.begin()))); in ~BlotMapVector()
50 iterator begin() { return Vector.begin(); } in begin()
51 iterator end() { return Vector.end(); } in end()
52 const_iterator begin() const { return Vector.begin(); } in begin()
53 const_iterator end() const { return Vector.end(); } in end()
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/ADT/
H A DMapVector.h38 VectorType Vector; variable
57 return std::move(Vector); in takeVector()
60 size_type size() const { return Vector.size(); } in size()
66 Vector.reserve(NumEntries); in reserve()
69 iterator begin() { return Vector.begin(); } in begin()
70 const_iterator begin() const { return Vector.begin(); } in begin()
71 iterator end() { return Vector.end(); } in end()
72 const_iterator end() const { return Vector.end(); } in end()
74 reverse_iterator rbegin() { return Vector.rbegin(); } in rbegin()
75 const_reverse_iterator rbegin() const { return Vector.rbegin(); } in rbegin()
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H A DUniqueVector.h35 VectorType Vector; variable
48 Val = static_cast<unsigned>(Vector.size()) + 1; in insert()
51 Vector.push_back(Entry); in insert()
71 return Vector[ID - 1];
75 iterator begin() { return Vector.begin(); } in begin()
78 const_iterator begin() const { return Vector.begin(); } in begin()
81 iterator end() { return Vector.end(); } in end()
84 const_iterator end() const { return Vector.end(); } in end()
87 size_t size() const { return Vector.size(); } in size()
90 bool empty() const { return Vector.empty(); } in empty()
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H A DSmallSet.h139 SmallVector<T, N> Vector; variable
159 [[nodiscard]] bool empty() const { return Vector.empty() && Set.empty(); } in empty()
162 return isSmall() ? Vector.size() : Set.size(); in size()
169 return vfind(V) == Vector.end() ? 0 : 1; in count()
186 if (I != Vector.end()) // Don't reinsert if it already exists. in insert()
188 if (Vector.size() < N) { in insert()
189 Vector.push_back(V); in insert()
190 return std::make_pair(const_iterator(std::prev(Vector.end())), true); in insert()
194 while (!Vector.empty()) { in insert()
195 Set.insert(Vector.back()); in insert()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td10 /// support code generation for the standard 'V' (Vector) extension, version
149 vti.Vector, vti.Vector, vti.Log2SEW,
152 vti.Vector, vti.Vector, vti.Log2SEW,
165 vti.Vector, vti.Vector, vti.Log2SEW,
224 vti.Vector, vti.Vector, vti.Log2SEW,
227 vti.Vector, vt
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H A DRISCVScheduleV.td280 // 3.6 Vector Byte Length vlenb
288 // 7. Vector Loads and Stores
289 // 7.4. Vector Unit-Stride Instructions
292 // 7.4.1. Vector Unit-Strided Mask
295 // 7.5. Vector Strided Instructions
304 // 7.6. Vector Indexed Instructions
321 // 7.7. Vector Unit-stride Fault-Only-First Loads
323 // 7.8. Vector Segment Instructions
337 // 7.9. Vector Whole Register Instructions
347 // 11. Vector Intege
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H A DRISCVInstrInfoVVLPatterns.td10 /// support code generation for the standard 'V' (Vector) extension, version
876 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
880 vti.Vector, vti.Vector, vti.Vector, vti.Mask,
893 vti.Vector, vti.Vector, vti.Vector, vt
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H A DRISCVInstrInfoZvk.td10 // Vector Cryptography Instructions extension, version Release 1.0.0.
576 def : Pat<(vti.Vector (op (vti.Vector vti.RegClass:$rs1))),
578 (vti.Vector (IMPLICIT_DEF)),
595 def : Pat<(vti.Vector (and (riscv_vnot vti.RegClass:$rs1),
598 (vti.Vector (IMPLICIT_DEF)),
602 def : Pat<(vti.Vector (and (riscv_splat_vector
606 (vti.Vector (IMPLICIT_DEF)),
644 def : Pat<(vti.Vector (rotl vti.RegClass:$rs2,
645 (vti.Vector (SplatPat_uimm
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H A DRISCVInstrInfoVPseudos.td10 /// for the standard 'V' (Vector) extension, version 1.0.
252 // Vector register and vector group type information.
257 ValueType Vector = Vec;
4608 vti.Vector, vti.Vector, vti.Mask,
4624 def : VPatUnaryNoMask<intrinsic, instruction, "M", vti.Vector, vti.Mask,
4626 def : VPatUnaryMask<intrinsic, instruction, "M", vti.Vector, vti.Mask,
4640 vti.Vector, fti.Vector,
4643 vti.Vector, ft
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H A DRISCVFeatures.td645 // Vector Extensions
648 "'Zvl' (Minimum Vector Length) 32", [],
655 "'Zvl' (Minimum Vector Length) "#I,
662 "'Zve32x' (Vector Extensions for Embedded Processors "
669 "'Zve32f' (Vector Extensions for Embedded Processors "
675 "'Zve64x' (Vector Extensions for Embedded Processors "
681 "'Zve64f' (Vector Extensions for Embedded Processors "
687 "'Zve64d' (Vector Extensions for Embedded Processors "
693 "'V' (Vector Extension for Application Processors)",
698 : RISCVExtension<"zvfbfmin", 1, 0, "'Zvbfmin' (Vector BF1
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/PBQP/
H A DMath.h25 class Vector {
26 friend hash_code hash_value(const Vector &);
30 explicit Vector(unsigned Length) in Vector() function
34 Vector(unsigned Length, PBQPNum InitVal) in Vector() function
40 Vector(const Vector &V) in Vector() function
46 Vector(Vector &&V) in Vector() function
52 bool operator==(const Vector &V) const {
80 Vector& operator+=(const Vector &V) {
100 inline hash_code hash_value(const Vector &V) { in hash_value()
109 OStream& operator<<(OStream &OS, const Vector &V) {
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/freebsd-src/contrib/llvm-project/compiler-rt/lib/scudo/standalone/
H A Dvector.h23 // NOTE: This class is not meant to be used directly, use Vector<T> instead.
124 class Vector : public VectorNoCtor<T, StaticNumEntries> {
127 "Vector must have a non-zero number of static entries.");
128 constexpr Vector() { VectorNoCtor<T, StaticNumEntries>::init(); }
129 explicit Vector(uptr Count) {
133 ~Vector() { VectorNoCtor<T, StaticNumEntries>::destroy(); }
135 Vector(const Vector &) = delete;
136 Vector &operator=(const Vector
116 constexpr Vector() { VectorNoCtor<T>::init(); } Vector() function
117 explicit Vector(uptr Count) { Vector() function
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/freebsd-src/contrib/bmake/
H A Dlst.h169 typedef struct Vector { struct
174 } Vector; argument
176 void Vector_Init(Vector *, size_t);
183 Vector_Get(Vector *v, size_t i) in Vector_Get()
189 void *Vector_Push(Vector *);
190 void *Vector_Pop(Vector *);
193 Vector_Done(Vector *v) in Vector_Done()
/freebsd-src/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_report.h58 Vector<ReportMopMutex> mset;
105 Vector<ReportStack*> stacks;
106 Vector<ReportMop*> mops;
107 Vector<ReportLocation*> locs;
108 Vector<ReportMutex*> mutexes;
109 Vector<ReportThread*> threads;
110 Vector<Tid> unique_tids;
/freebsd-src/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_vector.h24 class Vector {
26 Vector() : begin_(), end_(), last_() {} in Vector() function
28 ~Vector() { in ~Vector()
119 Vector(const Vector&);
120 void operator=(const Vector&);
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Schedule.td337 // Vector integer operations.
361 defm WriteVecALU : X86SchedWritePair<ReadAfterVecLd>; // Vector integer ALU op, no logicals.
362 defm WriteVecALUX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer ALU op, no logicals (XM…
363 defm WriteVecALUY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer ALU op, no logicals (YM…
364 defm WriteVecALUZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer ALU op, no logicals (ZM…
365 defm WriteVecLogic : X86SchedWritePair<ReadAfterVecLd>; // Vector integer and/or/xor logicals.
366 defm WriteVecLogicX : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer and/or/xor logicals (XM…
367 defm WriteVecLogicY : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer and/or/xor logicals (YM…
368 defm WriteVecLogicZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector integer and/or/xor logicals (ZM…
369 defm WriteVecTest : X86SchedWritePair<ReadAfterVecXLd>; // Vector integer TEST instructions.
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrVec.td2 // Vector Instructions
93 // Guide here. As those mnemonics, we use mnemonics defined in Vector Engine
124 // Section 8.9 - Vector Load/Store and Move Instructions
161 // Section 8.9.1 - VLD (Vector Load)
164 // Section 8.9.2 - VLDU (Vector Load Upper)
167 // Section 8.9.3 - VLDL (Vector Load Lower)
171 // Section 8.9.4 - VLD2D (Vector Load 2D)
174 // Section 8.9.5 - VLDU2D (Vector Load Upper 2D)
177 // Section 8.9.6 - VLDL2D (Vector Load Lower 2D)
214 // Section 8.9.7 - VST (Vector Store)
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt6 - Vector Compare Not Equal (Zero):
11 - Vector Extract Unsigned: vextractub vextractuh vextractuw vextractd
19 - Vector Extract Unsigned Byte Left/Right-Indexed:
32 - Vector Insert Element Instructions: vinsertb vinsertd vinserth vinsertw
38 - Vector Count Leading/Trailing Zero LSB. Result is placed into GPR[rD]:
44 - Vector Count Trailing Zeros: vctzb vctzh vctzw vctzd
51 - Vector Extend Sign: vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d
92 - Vector Integer Negate: vnegw vnegd
97 - Vector Parity Byte: vprtybw vprtybd vprtybq
103 - Vector (Bit) Permute (Right-indexed):
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/freebsd-src/contrib/llvm-project/compiler-rt/lib/memprof/
H A Dmemprof_rawprofile.cpp18 using ::__sanitizer::Vector;
32 auto *StackIds = reinterpret_cast<Vector<u64> *>(Arg); in RecordStackId()
88 u64 StackSizeBytes(const Vector<u64> &StackIds) { in StackSizeBytes()
116 void SerializeStackToBuffer(const Vector<u64> &StackIds, in SerializeStackToBuffer()
159 void SerializeMIBInfoToBuffer(MIBMapTy &MIBMap, const Vector<u64> &StackIds, in SerializeMIBInfoToBuffer()
235 Vector<u64> StackIds; in SerializeToRawProfile()
/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dandestech,ativic32.txt1 * Andestech Internal Vector Interrupt Controller
3 The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
5 bigger External Vector Interrupt Controller.
/freebsd-src/crypto/openssl/test/recipes/30-test_evp_data/
H A Devpciph_chacha.txt16 # A.1 Test Vector 1
23 # A.1 Test Vector 2
30 # A.2 Test Vector 1 is the same as A.1 Test Vector 1
31 # A.2 Test Vector 2
39 # A.2 Test Vector 3
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonIntrinsicsV5.td13 // Vector reduce add unsigned halfwords
23 // Vector reduce multiply word by signed half (32x16)
40 // Vector multiply halfwords, signed by unsigned
49 // Vector polynomial multiply halfwords
80 // Vector reduce add unsigned halfwords
153 // Vector conditional negate
160 // Vector reduce maximum halfwords
164 // Vector reduce maximum words
168 // Vector reduce minimum halfwords
172 // Vector reduce minimum words
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