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/openbsd-src/gnu/llvm/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX1030.rst43 …v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vcc<amdgpu_syni…
44 …v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc0<amdg…
45 …v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc0<amdg…
46 …v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc0<amdg…
47 …v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc0<amdg…
48 …v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc0<amdg…
49 …v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc<amdgp…
50 …v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc<amdgp…
51 …v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc<amdgp…
52 …v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vsrc0<amdg…
[all …]
H A DAMDGPUAsmGFX10.rst41 …v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vcc<amdgpu_synid_…
42 …v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
43 …v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
44 …v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
45 …v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
46 …v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
47 …v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_…
48 …v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_…
49 …v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc<amdgpu_…
50 …v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vsrc0<amdgpu…
[all …]
H A DAMDGPUAsmGFX908.rst63 …v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gf…
64 …v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
65 …v_dot2c_i32_i16 :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gf…
66 …v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
67 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gf…
68 …v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
69 …v_dot8c_i32_i4 :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gf…
70 …v_dot8c_i32_i4_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
71 …v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`src0<amdgpu_synid_gf…
72 …v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
[all …]
H A DAMDGPUAsmGFX940.rst43 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
44 …ds_add_rtn_f64 :ref:`vdst<amdgpu_synid_gfx940_vdst_0f48d1>`, :ref:`vaddr<amd…
45 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
46 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx940_vdst_0f48d1>`, :ref:`vaddr<amd…
51 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
52 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx940_vdst_0f48d1>`, :ref:`vaddr<amd…
53 …ds_append :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>` …
54 …ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
59 …ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
60 …ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx940_vdst_0f48d1>`, :ref:`vaddr<amd…
[all …]
H A DAMDGPUAsmGFX90a.rst43 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
44 …ds_add_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amd…
45 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
46 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amd…
51 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
52 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amd…
53 …ds_append :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>` …
54 …ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
59 …ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
60 …ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amd…
[all …]
H A DAMDGPUAsmGFX9.rst42 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
43 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
44 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`, :ref:`vaddr<amdgp…
52 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
53 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`, :ref:`vaddr<amdgp…
56 …ds_append :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>` …
57 …ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
62 …ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
63 …ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`, :ref:`vaddr<amdgp…
64 …ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
[all …]
H A DAMDGPUAsmGFX7.rst41 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
42 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
49 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
50 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
53 …ds_append :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>` …
58 …ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
59 …ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
60 …ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
61 …ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
62 …ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
[all …]
H A DAMDGPUAsmGFX8.rst42 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
43 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
44 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgp…
52 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
53 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgp…
56 …ds_append :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>` …
57 …ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
62 …ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
63 …ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgp…
64 …ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
[all …]
H A DAMDGPUAsmGFX11.rst44 …ds_add_gs_reg_rtn :ref:`vdst<amdgpu_synid_gfx11_vdst_bdb32f>`::ref:`b64<amdgpu_…
45 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref…
46 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref…
47 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx11_vdst_bdb32f>`, :ref…
52 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref…
53 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx11_vdst_bdb32f>`, :ref…
54 …ds_append :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>` …
55 …ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref…
56 …ds_bvh_stack_rtn_b32 :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref:`vaddr…
61 …ds_cmpstore_rtn_b32 :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref…
[all …]
H A DAMDGPUAsmGFX906.rst43 …v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_…
44 …v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid…
45 …v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_…
46 …v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`vsrc0<amdgpu_synid…
47 …v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_…
56 …v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_…
57 …v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_…
66 …v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_sr…
67 …v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_sr…
68 …v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx906_vdst>`, :ref:`src0<amdgpu_synid_gfx906_sr…
[all …]
H A DAMDGPUAsmGFX1011.rst43 …v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011…
44 …v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx1011…
53 …v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_syni…
54 …v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`vsrc0<amdgpu_syni…
63 …v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
64 …v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
73 …v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
74 …v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
75 …v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
76 …v_dot4_i32_i8 :ref:`vdst<amdgpu_synid_gfx1011_vdst>`, :ref:`src0<amdgpu_synid…
[all …]
H A DAMDGPUAsmGFX1013.rst43 …image_bvh64_intersect_ray :ref:`vdst<amdgpu_synid_gfx1013_vdst_9041ac>`, :ref:`vaddr<amdgpu…
44 …image_bvh_intersect_ray :ref:`vdst<amdgpu_synid_gfx1013_vdst_9041ac>`, :ref:`vaddr<amdgpu…
45 …image_msaa_load :ref:`vdst<amdgpu_synid_gfx1013_vdst_eae4c8>`, :ref:`vaddr<amdgpu…
H A DAMDGPUAsmGFX904.rst43 …v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_…
44 …v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_…
45 …v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx904_vdst>`, :ref:`src0<amdgpu_synid_…
H A DAMDGPUAsmGFX900.rst43 …v_mad_mix_f32 :ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_…
44 …v_mad_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_…
45 …v_mad_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx900_vdst>`, :ref:`src0<amdgpu_synid_…
H A Dgfx10_vdst_48e42f.rst10 vdst title
H A Dgfx90a_vdst_69a144.rst10 vdst title
/openbsd-src/gnu/llvm/compiler-rt/lib/tsan/rtl/
H A Dtsan_vector_clock.cpp43 m128* __restrict vdst = reinterpret_cast<m128*>(clk_); in Acquire() local
47 m128 d = _mm_load_si128(&vdst[i]); in Acquire()
49 _mm_store_si128(&vdst[i], m); in Acquire()
75 m128* __restrict vdst = reinterpret_cast<m128*>(clk_); in operator =()
79 _mm_store_si128(&vdst[i], s); in operator =()
94 m128* __restrict vdst = reinterpret_cast<m128*>(dst->clk_); in ReleaseStoreAcquire() local
97 m128 t = _mm_load_si128(&vdst[i]); in ReleaseStoreAcquire()
100 _mm_store_si128(&vdst[i], c); in ReleaseStoreAcquire()
114 m128* __restrict vdst = reinterpret_cast<m128*>(dst->clk_); in ReleaseAcquire() local
118 m128 d = _mm_load_si128(&vdst[i]); in ReleaseAcquire()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DLDSDIRInstructions.td18 bits<8> vdst;
27 let Inst{7-0} = vdst;
42 (outs VGPR_32:$vdst),
72 " $vdst$waitvdst",
73 " $vdst, $attr$attrchan$waitvdst"
H A DVOP1Instructions.td14 bits<8> vdst;
19 let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
24 bits<8> vdst;
28 let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
33 bits<8> vdst;
37 let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
103 [(set P.DstVT:$vdst, (node (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers))))],
105 [(set P.DstVT:$vdst, (node (P.Src0VT (VOP3OMods P.Src0VT:$src0,
107 [(set P.DstVT:$vdst, (node P.Src0VT:$src0))]
166 let AsmVOP3Base = "$vdst, $src0$clamp$omod";
[all …]
H A DVOPInstructions.td245 bits<8> vdst;
246 let Inst{7-0} = !if(p.EmitDst, vdst{7-0}, 0);
250 bits<8> vdst;
251 let Inst{7-0} = !if(p.EmitDst, vdst{7-0}, 0);
257 bits<8> vdst;
258 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
319 bits<8> vdst;
329 let Inst{7-0} = vdst;
342 bits<8> vdst;
351 let Inst{7-0} = vdst;
[all …]
H A DVINTERPInstructions.td14 bits<8> vdst;
28 let Inst{7-0} = vdst;
70 let Outs64 = (outs VGPR_32:$vdst);
77 let Asm64 = " $vdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$waitexp";
88 let Outs64 = (outs VGPR_32:$vdst);
95 let Asm64 = " $vdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$op_sel$waitexp";
H A DVOP2Instructions.td14 bits<8> vdst;
20 let Inst{24-17} = !if(P.EmitDst, vdst, 0);
26 bits<8> vdst;
33 let Inst{24-17} = !if(P.EmitDst, vdst, 0);
40 bits<8> vdst;
45 let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
51 bits<8> vdst;
56 let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
124 [(set P.DstVT:$vdst,
130 [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))]);
[all …]
H A DSIPeepholeSDWA.cpp363 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in convertToSDWA()
379 AMDGPU::OpName::vdst); in convertToSDWA()
445 MachineOperand *Operand = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in convertToSDWA()
486 MI.tieOperands(AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst), in convertToSDWA()
548 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
585 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
648 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
676 MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
809 MachineOperand *OrDst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst); in matchSDWAOperand()
898 .add(*TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) in pseudoOpConvertToVOP2()
[all …]
H A DDSInstructions.td79 bits<10> vdst;
91 bits<1> acc = !if(ps.has_vdst, vdst{9},
182 (outs dst_op:$vdst),
184 " $vdst, $data0$offset gds"> {
197 (outs data_op:$vdst),
199 " $vdst, $addr, $data0$offset$gds"> {
233 (outs dst_op:$vdst),
235 " $vdst, $addr, $data0, $data1$offset$gds"> {
260 (outs dst_op:$vdst),
262 " $vdst, $addr, $data0, $data1$offset0$offset1$gds"> {
[all …]
H A DVOP3Instructions.td11 let Asm64 = " $vdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$omod" in {
13 let Outs64 = (outs DstRC.RegClass:$vdst);
18 let Outs64 = (outs DstRC.RegClass:$vdst);
23 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
24 let Asm64 = "$vdst, $sdst, $src0_modifiers, $src1_modifiers, $src2_modifiers$clamp$omod";
37 let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
38 let Asm64 = "$vdst, $sdst, $src0, $src1, $src2$clamp";
67 let Asm64 = "$vdst, $src0_modifiers, $attr$attrchan$clamp$omod";
75 let Asm64 = "$vdst, $src0, $attr$attrchan$clamp$omod";
85 " $vdst, $src0_modifiers, $attr$attrchan"#src2#"$high$clamp"#omod;
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