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Searched refs:uint32_t (Results 1 – 25 of 4461) sorted by relevance

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/openbsd-src/sys/dev/pci/drm/amd/include/
H A Dv11_structs.h28 uint32_t shadow_base_lo; // offset: 0 (0x0)
29 uint32_t shadow_base_hi; // offset: 1 (0x1)
30 uint32_t gds_bkup_base_lo; // offset: 2 (0x2)
31 uint32_t gds_bkup_base_hi; // offset: 3 (0x3)
32 uint32_t fw_work_area_base_lo; // offset: 4 (0x4)
33 uint32_t fw_work_area_base_hi; // offset: 5 (0x5)
34 uint32_t shadow_initialized; // offset: 6 (0x6)
35 uint32_t ib_vmid; // offset: 7 (0x7)
36 uint32_t reserved_8; // offset: 8 (0x8)
37 uint32_t reserved_9; // offset: 9 (0x9)
[all …]
H A Dv10_structs.h29 uint32_t reserved_0; // offset: 0 (0x0)
30 uint32_t reserved_1; // offset: 1 (0x1)
31 uint32_t reserved_2; // offset: 2 (0x2)
32 uint32_t reserved_3; // offset: 3 (0x3)
33 uint32_t reserved_4; // offset: 4 (0x4)
34 uint32_t reserved_5; // offset: 5 (0x5)
35 uint32_t reserved_6; // offset: 6 (0x6)
36 uint32_t reserved_7; // offset: 7 (0x7)
37 uint32_t reserved_8; // offset: 8 (0x8)
38 uint32_t reserved_9; // offset: 9 (0x9)
[all …]
H A Dv9_structs.h28 uint32_t sdmax_rlcx_rb_cntl;
29 uint32_t sdmax_rlcx_rb_base;
30 uint32_t sdmax_rlcx_rb_base_hi;
31 uint32_t sdmax_rlcx_rb_rptr;
32 uint32_t sdmax_rlcx_rb_rptr_hi;
33 uint32_t sdmax_rlcx_rb_wptr;
34 uint32_t sdmax_rlcx_rb_wptr_hi;
35 uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
36 uint32_t sdmax_rlcx_rb_rptr_addr_hi;
37 uint32_t sdmax_rlcx_rb_rptr_addr_lo;
[all …]
H A Dvi_structs.h28 uint32_t sdmax_rlcx_rb_cntl;
29 uint32_t sdmax_rlcx_rb_base;
30 uint32_t sdmax_rlcx_rb_base_hi;
31 uint32_t sdmax_rlcx_rb_rptr;
32 uint32_t sdmax_rlcx_rb_wptr;
33 uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
34 uint32_t sdmax_rlcx_rb_wptr_poll_addr_hi;
35 uint32_t sdmax_rlcx_rb_wptr_poll_addr_lo;
36 uint32_t sdmax_rlcx_rb_rptr_addr_hi;
37 uint32_t sdmax_rlcx_rb_rptr_addr_lo;
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H A Dcik_structs.h28 uint32_t header;
29 uint32_t compute_dispatch_initiator;
30 uint32_t compute_dim_x;
31 uint32_t compute_dim_y;
32 uint32_t compute_dim_z;
33 uint32_t compute_start_x;
34 uint32_t compute_start_y;
35 uint32_t compute_start_z;
36 uint32_t compute_num_thread_x;
37 uint32_t compute_num_thread_y;
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H A Ddiscovery.h59 uint32_t binary_signature; /* 0x7, 0x14, 0x21, 0x28 */
76 uint32_t signature; /* Table Signature */
79 uint32_t id; /* Table ID */
107 uint32_t base_address[]; /* variable number of Addresses */
125 uint32_t base_address[]; /* Base Address list. Corresponds to the num_base_address field*/
143 …DECLARE_FLEX_ARRAY(uint32_t, base_address); /* 32-bit Base Address list. Corresponds to the num_ba…
170 uint32_t table_id; /* table ID */
173 uint32_t size; /* size of the entire header+data in bytes */
179 uint32_t gc_num_se;
180 uint32_t gc_num_wgp0_per_sa;
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H A Dkgd_kfd_interface.h51 uint32_t vmid;
52 uint32_t mc_id;
53 uint32_t status;
61 uint32_t num_shader_engines;
62 uint32_t num_shader_arrays_per_engine;
63 uint32_t num_cu_per_sh;
64 uint32_t cu_active_number;
65 uint32_t cu_ao_mask;
66 uint32_t simd_per_cu;
67 uint32_t max_waves_per_simd;
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H A Dmes_v11_api_def.h69 uint32_t type : 4; /* 0 - Invalid; 1 - Scheduling; 2 - TBD */
70 uint32_t opcode : 8;
71 uint32_t dwsize : 8; /* including header */
72 uint32_t reserved : 12;
75 uint32_t u32All;
170 uint32_t first_free_entry_index;
171 uint32_t wraparound_count;
178 uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */
179 uint32_t reserved_operation_type_bits;
202 uint32_t vmid_mask_mmhub;
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H A Dmes_api_def.h69 uint32_t type : 4; /* 0 - Invalid; 1 - Scheduling; 2 - TBD */
70 uint32_t opcode : 8;
71 uint32_t dwsize : 8; /* including header */
72 uint32_t reserved : 12;
75 uint32_t u32All;
163 uint32_t first_free_entry_index;
164 uint32_t wraparound_count;
171 uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */
172 uint32_t reserved_operation_type_bits;
195 uint32_t vmid_mask_mmhub;
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/openbsd-src/sys/dev/pci/
H A Dif_ocereg.h167 uint32_t length;
175 uint32_t timeout;
176 uint32_t length;
188 uint32_t flags;
191 uint32_t payload_length;
192 uint32_t tag[2];
193 uint32_t _rsvd;
206 uint32_t extended_status:16;
207 uint32_t completion_status:16;
209 uint32_t mq_tag[2];
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/openbsd-src/sys/dev/pci/drm/amd/amdkfd/
H A Dkfd_pm4_headers_ai.h32 uint32_t reserved1 : 8; /* < reserved */
33 uint32_t opcode : 8; /* < IT opcode */
34 uint32_t count : 14;/* < number of DWORDs - 1 in the
37 uint32_t type : 2; /* < packet identifier.
41 uint32_t u32All;
59 uint32_t ordinal1;
64 uint32_t vmid_mask:16;
65 uint32_t unmap_latency:8;
66 uint32_t reserved1:5;
69 uint32_t ordinal2;
[all …]
H A Dkfd_pm4_headers_vi.h32 uint32_t reserved1 : 8; /* < reserved */
33 uint32_t opcode : 8; /* < IT opcode */
34 uint32_t count : 14;/* < Number of DWORDS - 1 in the
37 uint32_t type : 2; /* < packet identifier
41 uint32_t u32All;
59 uint32_t ordinal1;
64 uint32_t vmid_mask:16;
65 uint32_t unmap_latency:8;
66 uint32_t reserved1:5;
69 uint32_t ordinal2;
[all …]
H A Dkfd_pm4_headers.h33 uint32_t reserved1:8;
35 uint32_t opcode:8;
37 uint32_t count:14;
39 uint32_t type:2;
41 uint32_t u32all;
54 uint32_t ordinal1;
59 uint32_t pasid:16;
60 uint32_t reserved1:8;
61 uint32_t diq_enable:1;
62 uint32_t process_quantum:7;
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/openbsd-src/sys/dev/pci/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h67 uint32_t enum_id:16; /* 1 based enum */
73 uint32_t clk_mask_register_index;
74 uint32_t clk_en_register_index;
75 uint32_t clk_y_register_index;
76 uint32_t clk_a_register_index;
77 uint32_t data_mask_register_index;
78 uint32_t data_en_register_index;
79 uint32_t data_y_register_index;
80 uint32_t data_a_register_index;
82 uint32_t clk_mask_shift;
[all …]
H A Dbios_parser_types.h119 uint32_t pixel_clock; /* khz */
132 uint32_t pixel_clock; /* in KHz */
161 uint32_t pixel_clock;
162 uint32_t lane_select;
163 uint32_t lane_settings;
172 uint32_t h_total;
173 uint32_t h_addressable;
174 uint32_t h_overscan_left;
175 uint32_t h_overscan_right;
176 uint32_t h_sync_start;
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/openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Utility/
H A DRegisterContextPOSIX_x86.h21 uint32_t concrete_frame_idx,
57 static uint32_t g_contained_eax[];
58 static uint32_t g_contained_ebx[];
59 static uint32_t g_contained_ecx[];
60 static uint32_t g_contained_edx[];
61 static uint32_t g_contained_edi[];
62 static uint32_t g_contained_esi[];
63 static uint32_t g_contained_ebp[];
64 static uint32_t g_contained_esp[];
66 static uint32_t g_invalidate_eax[];
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H A DARMUtils.h20 static inline uint32_t Align(uint32_t val, uint32_t alignment) { in Align()
24 static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, in DecodeImmShift()
54 static inline uint32_t DecodeImmShiftThumb(const uint32_t opcode, in DecodeImmShiftThumb()
63 static inline uint32_t DecodeImmShiftARM(const uint32_t opcode, in DecodeImmShiftARM()
68 static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t, in DecodeImmShift()
69 const uint32_t imm5) { in DecodeImmShift()
74 static inline ARM_ShifterType DecodeRegShift(const uint32_t type) { in DecodeRegShift()
90 static inline uint32_t LSL_C(const uint32_t value, const uint32_t amount, in LSL_C()
91 uint32_t &carry_out, bool *success) { in LSL_C()
101 static inline uint32_t LSL(const uint32_t value, const uint32_t amount, in LSL()
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/openbsd-src/sys/dev/
H A Drndis.h99 uint32_t rm_type;
100 uint32_t rm_len;
110 uint32_t rm_type;
111 uint32_t rm_len;
112 uint32_t rm_dataoffset;
113 uint32_t rm_datalen;
114 uint32_t rm_oobdataoffset;
115 uint32_t rm_oobdatalen;
116 uint32_t rm_oobdataelements;
117 uint32_t rm_pktinfooffset;
[all …]
/openbsd-src/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_ucode.h29 uint32_t size_bytes; /* size of the entire header+image(s) in bytes */
30 uint32_t header_size_bytes; /* size of just the header in bytes */
35 uint32_t ucode_version;
36 uint32_t ucode_size_bytes; /* size of ucode in bytes */
37 uint32_t ucode_array_offset_bytes; /* payload offset from the start of the header */
38 uint32_t crc32; /* crc32 checksum of the payload */
44 uint32_t io_debug_size_bytes; /* size of debug array in dwords */
45 uint32_t io_debug_array_offset_bytes; /* payload offset from the start of the header */
51 uint32_t ucode_start_addr;
57 uint32_t ppt_offset_bytes; /* soft pptable offset */
[all …]
H A Damdgpu_amdkfd_gfx_v9.h23 void kgd_gfx_v9_program_sh_mem_settings(struct amdgpu_device *adev, uint32_t vmid,
24 uint32_t sh_mem_config,
25 uint32_t sh_mem_ape1_base, uint32_t sh_mem_ape1_limit,
26 uint32_t sh_mem_bases, uint32_t inst);
28 unsigned int vmid, uint32_t inst);
29 int kgd_gfx_v9_init_interrupts(struct amdgpu_device *adev, uint32_t pipe_id,
30 uint32_t inst);
31 int kgd_gfx_v9_hqd_load(struct amdgpu_device *adev, void *mqd, uint32_t pipe_id,
32 uint32_t queue_id, uint32_t __user *wptr,
33 uint32_t wptr_shift, uint32_t wptr_mask,
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/openbsd-src/gnu/llvm/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.h27 bool InitIT(uint32_t bits7_0);
40 uint32_t GetCond();
43 uint32_t ITCounter = 0; // Possible values: 0, 1, 2, 3, 4.
44 uint32_t ITState = 0; // A2.5.2 Consists of IT[7:5] and IT[4:0] initially.
132 bool EvaluateInstruction(uint32_t evaluate_options) override;
140 uint32_t reg_num) override;
144 uint32_t ArchVersion();
146 bool ConditionPassed(const uint32_t opcode);
148 uint32_t CurrentCond(const uint32_t opcode);
157 bool BadMode(uint32_t mode);
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/openbsd-src/sys/dev/usb/
H A Dif_uathreg.h25 uint32_t flags;
28 uint32_t len;
31 uint32_t total;
32 uint32_t remain;
33 uint32_t rxtotal;
34 uint32_t pad[123];
41 uint32_t len;
42 uint32_t code;
76 uint32_t priv; /* driver private data */
77 uint32_t magic;
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/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu8_hwmgr.h45 uint32_t soft_min_clk;
46 uint32_t hard_min_clk;
47 uint32_t soft_max_clk;
48 uint32_t hard_max_clk;
52 uint32_t bootup_uma_clock;
53 uint32_t bootup_engine_clock;
54 uint32_t dentist_vco_freq;
55 uint32_t nb_dpm_enable;
56 uint32_t nbp_memory_clock[SMU8_NUM_NBPMEMORYCLOCK];
57 uint32_t nbp_n_clock[SMU8_NUM_NBPSTATES];
[all …]
/openbsd-src/regress/usr.sbin/bgpd/unittests/
H A Drde_aspa_test.c25 static struct aspath *build_aspath(const uint32_t *, uint32_t, int);
26 static const char *print_aspath(const uint32_t *, uint32_t);
32 uint32_t customeras;
33 const uint32_t *providers;
34 uint32_t pascnt;
38 uint32_t customeras;
39 uint32_t provideras;
44 const uint32_t *aspath;
45 uint32_t aspathcnt;
50 const uint32_t *aspath;
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/openbsd-src/sys/dev/ic/
H A Dqwxreg.h118 uint32_t cmd_id;
122 uint32_t header;
128 #define TLV_HDR_SIZE sizeof(uint32_t) /* wmi_tlv.header */
2293 uint32_t pdev_id;
2294 uint32_t start_freq;
2295 uint32_t end_freq;
2299 uint32_t numss_m1;
2300 uint32_t ru_bit_mask;
2301 uint32_t ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2305 uint32_t default_conc_scan_config_bit
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