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Searched refs:soffset (Results 1 – 25 of 55) sorted by relevance

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/openbsd-src/sys/dev/pci/drm/
H A Ddrm_suballoc.c158 return list_entry(hole->next, struct drm_suballoc, olist)->soffset; in drm_suballoc_hole_eoffset()
166 size_t soffset, eoffset, wasted; in drm_suballoc_try_alloc() local
168 soffset = drm_suballoc_hole_soffset(sa_manager); in drm_suballoc_try_alloc()
170 wasted = round_up(soffset, align) - soffset; in drm_suballoc_try_alloc()
172 if ((eoffset - soffset) >= (size + wasted)) { in drm_suballoc_try_alloc()
173 soffset += wasted; in drm_suballoc_try_alloc()
176 sa->soffset = soffset; in drm_suballoc_try_alloc()
177 sa->eoffset = soffset + size; in drm_suballoc_try_alloc()
189 size_t soffset, eoffset, wasted; in __drm_suballoc_event() local
196 soffset = drm_suballoc_hole_soffset(sa_manager); in __drm_suballoc_event()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DBUFInstructions.td145 bits<8> soffset;
161 …dag NonVaddrInputs = (ins SReg_128:$srsrc, SCSrc_b32:$soffset, offset:$offset, FORMAT:$format, CPo…
179 !if(!eq(addrKind, BUFAddrKind.Offset), "off, $srsrc,$format $soffset",
181 "$vaddr, $srsrc,$format $soffset offen",
183 "$vaddr, $srsrc,$format $soffset idxen",
185 "$vaddr, $srsrc,$format $soffset idxen offen",
187 "$vaddr, $srsrc,$format $soffset addr64",
336 bits<8> soffset;
390 …dag NonVaddrInputs = (ins SReg_128:$srsrc, SCSrc_b32:$soffset, offset:$offset, CPol_0:$cpol, SWZ_0…
429 !if(!eq(addrKind, BUFAddrKind.Offset), "off, $srsrc, $soffset",
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H A DSMInstructions.td86 bits<8> soffset;
100 def SGPR_Offset : OffsetMode<0, 1, "_SGPR", (ins SReg_32:$soffset), "$soffset">;
102 (ins SReg_32:$soffset, smem_offset_mod:$offset),
103 "$soffset$offset">;
466 let Inst{7-0} = !if(ps.has_offset, offset{7-0}, !if(ps.has_soffset, soffset, ?));
483 let InOperandList = (ins sgprPs.BaseClass:$sbase, SReg_32:$soffset, CPol:$cpol);
531 // soffset.
542 !if(ps.has_soffset, soffset{6-0}, ?));
546 // soffset
548 soffset{6-0}, ?);
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/openbsd-src/sys/dev/pci/drm/include/drm/
H A Ddrm_suballoc.h46 size_t soffset; member
70 return sa->soffset; in drm_suballoc_soffset()
92 return sa->eoffset - sa->soffset; in drm_suballoc_size()
/openbsd-src/sys/dev/pci/drm/radeon/
H A Dradeon_vm.c449 uint64_t soffset, in radeon_vm_bo_set_addr() argument
458 if (soffset) { in radeon_vm_bo_set_addr()
460 eoffset = soffset + size - 1; in radeon_vm_bo_set_addr()
461 if (soffset >= eoffset) { in radeon_vm_bo_set_addr()
479 soffset /= RADEON_GPU_PAGE_SIZE; in radeon_vm_bo_set_addr()
481 if (soffset || eoffset) { in radeon_vm_bo_set_addr()
483 it = interval_tree_iter_first(&vm->va, soffset, eoffset); in radeon_vm_bo_set_addr()
490 soffset, tmp->bo, tmp->it.start, tmp->it.last); in radeon_vm_bo_set_addr()
520 if (soffset || eoffset) { in radeon_vm_bo_set_addr()
522 bo_va->it.start = soffset; in radeon_vm_bo_set_addr()
[all …]
H A Dradeon_trace.h69 __field(u64, soffset)
75 __entry->soffset = bo_va->it.start;
80 __entry->soffset, __entry->eoffset, __entry->flags)
/openbsd-src/gnu/llvm/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX90a.rst340 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
341 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
342 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
343 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
344 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
345 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
346 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
347 …0a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
348 …a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
349 …a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
[all …]
H A DAMDGPUAsmGFX9.rst436 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
437 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
438 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
439 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
440 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
441 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
442 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
443 …gfx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
444 …fx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
445 …fx9_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx9_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx9…
[all …]
H A DAMDGPUAsmGFX940.rst325 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
326 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
327 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
328 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
329 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
330 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
331 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
332 …id_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
333 …d_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
334 …d_gfx940_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx940_srsrc>`, :ref:`soffset<amdgpu_synid_gfx9…
[all …]
H A DAMDGPUAsmGFX10.rst681 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
682 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
683 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
684 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
685 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
686 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
687 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
688 …x10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
689 …10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
690 …10_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx1…
[all …]
H A DAMDGPUAsmGFX7.rst349 …gfx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
350 …gfx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
351 …gfx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
352 …gfx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
353 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
354 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
355 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
356 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
365 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
366 …fx7_vaddr_da1f09>`, :ref:`srsrc<amdgpu_synid_gfx7_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx7…
[all …]
H A Dgfx8_soffset_32c2a9.rst10 soffset title
H A Dgfx1030_soffset_fef808.rst10 soffset title
H A Dgfx11_soffset_fef808.rst10 soffset title
H A Dgfx10_soffset_b556e6.rst10 soffset title
H A Dgfx7_soffset_48c95e.rst10 soffset title
H A Dgfx8_soffset_abb420.rst10 soffset title
H A Dgfx940_soffset_4318ca.rst10 soffset title
H A Dgfx9_soffset_4318ca.rst10 soffset title
H A Dgfx908_soffset.rst10 soffset title
H A Dgfx90a_soffset_4318ca.rst10 soffset title
H A Dgfx8_soffset_b5af46.rst10 soffset title
H A DAMDGPUAsmGFX8.rst347 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
348 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
349 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
350 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
351 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
352 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
353 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
354 …gfx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
355 …fx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
356 …fx8_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx8_srsrc_80eef6>`, :ref:`soffset<amdgpu_synid_gfx8…
[all …]
H A Dgfx10_soffset_0f304c.rst10 soffset title
H A Dgfx11_soffset_0f304c.rst10 soffset title

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