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Searched refs:setOpcode (Results 1 – 25 of 82) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCDuplexInfo.cpp710 Result.setOpcode(Hexagon::SA1_inc); in deriveSubInst()
716 Result.setOpcode(Hexagon::SA1_dec); in deriveSubInst()
723 Result.setOpcode(Hexagon::SA1_addsp); in deriveSubInst()
729 Result.setOpcode(Hexagon::SA1_addi); in deriveSubInst()
735 Result.setOpcode(Hexagon::SA1_addrx); in deriveSubInst()
741 Result.setOpcode(Hexagon::SS2_allocframe); in deriveSubInst()
746 Result.setOpcode(Hexagon::SA1_zxtb); in deriveSubInst()
751 Result.setOpcode(Hexagon::SA1_and1); in deriveSubInst()
757 Result.setOpcode(Hexagon::SA1_cmpeqi); in deriveSubInst()
766 Result.setOpcode(Hexagon::SA1_combine1i); in deriveSubInst()
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H A DHexagonMCCompound.cpp214 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
227 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
241 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
254 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
267 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
285 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
303 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
314 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
325 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp249 T.setOpcode(Inst.getOpcode()); in ScaleVectorOffset()
278 Inst.setOpcode(Hexagon::A2_addi); in HexagonProcessInstruction()
292 Inst.setOpcode(Hexagon::A2_paddif); in HexagonProcessInstruction()
299 Inst.setOpcode(Hexagon::A2_paddit); in HexagonProcessInstruction()
306 Inst.setOpcode(Hexagon::A2_paddifnew); in HexagonProcessInstruction()
313 Inst.setOpcode(Hexagon::A2_padditnew); in HexagonProcessInstruction()
320 Inst.setOpcode(Hexagon::A2_andir); in HexagonProcessInstruction()
337 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in HexagonProcessInstruction()
354 TmpInst.setOpcode(Hexagon::L2_loadrigp); in HexagonProcessInstruction()
367 MappedInst.setOpcode(Hexagon::C2_or); in HexagonProcessInstruction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp256 Inst.setOpcode(XCore::STW_2rus); in Decode2OpInstructionFail()
259 Inst.setOpcode(XCore::LDW_2rus); in Decode2OpInstructionFail()
262 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
265 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
268 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
271 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
274 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
277 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
280 Inst.setOpcode(XCore::OR_3r); in Decode2OpInstructionFail()
283 Inst.setOpcode(XCore::LDW_3r); in Decode2OpInstructionFail()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp160 MCB.setOpcode(Hexagon::BUNDLE); in HexagonAsmParser()
537 NewInst.setOpcode(MCI.getOpcode()); in canonicalizeImmediates()
1236 TmpInst.setOpcode(opCode); in makeCombineInst()
1343 Inst.setOpcode(Hexagon::A2_addi); in processInstruction()
1377 Inst.setOpcode(Hexagon::C2_cmpgti); in processInstruction()
1391 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction()
1401 Inst.setOpcode(Hexagon::C2_cmpgtui); in processInstruction()
1412 Inst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1422 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrpt) in processInstruction()
1433 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrptnew) in processInstruction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVAsmPrinter.cpp126 FunctionEndInst.setOpcode(SPIRV::OpFunctionEnd); in outputOpFunctionEnd()
140 LabelInst.setOpcode(SPIRV::OpLabel); in emitOpLabel()
252 Inst.setOpcode(SPIRV::OpSourceExtension); in outputDebugSourceAndStrings()
258 Inst.setOpcode(SPIRV::OpSource); in outputDebugSourceAndStrings()
270 Inst.setOpcode(SPIRV::OpExtInstImport); in outputOpExtInstImports()
281 Inst.setOpcode(SPIRV::OpMemoryModel); in outputOpMemoryModel()
330 Inst.setOpcode(SPIRV::OpCapability); in outputGlobalRequirements()
338 Inst.setOpcode(SPIRV::OpExtension); in outputGlobalRequirements()
408 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionModeFromMDNode()
420 Inst.setOpcode(SPIRV::OpExecutionMode); in outputExecutionMode()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp276 Inst.setOpcode(AVR::RJMPk); in decodeFBRk()
279 Inst.setOpcode(AVR::RCALLk); in decodeFBRk()
301 Inst.setOpcode(AVR::LDDRdPtrQ); in decodeLoadStore()
306 Inst.setOpcode(AVR::STDPtrQRr); in decodeLoadStore()
354 Inst.setOpcode(AVR::STPtrRr); in decodeLoadStore()
359 Inst.setOpcode(AVR::STPtrPiRr); in decodeLoadStore()
362 Inst.setOpcode(AVR::STPtrPdRr); in decodeLoadStore()
365 Inst.setOpcode(AVR::LDRdPtr); in decodeLoadStore()
370 Inst.setOpcode(AVR::LDRdPtrPi); in decodeLoadStore()
373 Inst.setOpcode(AVR::LDRdPtrPd); in decodeLoadStore()
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYAsmBackend.cpp301 Res.setOpcode(CSKY::LRW32); in relaxInstruction()
306 Res.setOpcode(CSKY::BR32); in relaxInstruction()
310 Res.setOpcode(CSKY::JSRI32); in relaxInstruction()
314 Res.setOpcode(CSKY::JMPI32); in relaxInstruction()
319 Res.setOpcode(Inst.getOpcode() == CSKY::JBT32 ? CSKY::JBT_E : CSKY::JBF_E); in relaxInstruction()
325 Res.setOpcode(CSKY::JBR32); in relaxInstruction()
338 Res.setOpcode(opcode); in relaxInstruction()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp817 TmpInst.setOpcode((Opcode == PPC::DCBTx || Opcode == PPC::DCBTT) ? in ProcessInstruction()
829 TmpInst.setOpcode(PPC::DCBT); in ProcessInstruction()
839 TmpInst.setOpcode(PPC::DCBTST); in ProcessInstruction()
862 TmpInst.setOpcode(PPC::DCBF); in ProcessInstruction()
871 TmpInst.setOpcode(PPC::LA); in ProcessInstruction()
880 TmpInst.setOpcode(PPC::ADDI); in ProcessInstruction()
889 TmpInst.setOpcode(PPC::ADDIS); in ProcessInstruction()
898 TmpInst.setOpcode(PPC::ADDIC); in ProcessInstruction()
907 TmpInst.setOpcode(PPC::ADDIC_rec); in ProcessInstruction()
919 TmpInst.setOpcode(Opcode == PPC::EXTLWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp623 MI.setOpcode(Mips::BOVC); in DecodeAddiGroupBranch()
626 MI.setOpcode(Mips::BEQC); in DecodeAddiGroupBranch()
629 MI.setOpcode(Mips::BEQZALC); in DecodeAddiGroupBranch()
651 MI.setOpcode(Mips::BOVC_MMR6); in DecodePOP35GroupBranchMMR6()
658 MI.setOpcode(Mips::BEQC_MMR6); in DecodePOP35GroupBranchMMR6()
665 MI.setOpcode(Mips::BEQZALC_MMR6); in DecodePOP35GroupBranchMMR6()
696 MI.setOpcode(Mips::BNVC); in DecodeDaddiGroupBranch()
699 MI.setOpcode(Mips::BNEC); in DecodeDaddiGroupBranch()
702 MI.setOpcode(Mips::BNEZALC); in DecodeDaddiGroupBranch()
724 MI.setOpcode(Mips::BNVC_MMR6); in DecodePOP37GroupBranchMMR6()
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/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp88 SICInst.setOpcode(VE::SIC); in emitSIC()
96 BSICInst.setOpcode(VE::BSICrii); in emitBSIC()
108 LEAInst.setOpcode(VE::LEAzii); in emitLEAzzi()
120 LEASLInst.setOpcode(VE::LEASLzii); in emitLEASLzzi()
132 LEAInst.setOpcode(VE::LEAzii); in emitLEAzii()
145 LEASLInst.setOpcode(VE::LEASLrri); in emitLEASLrri()
157 Inst.setOpcode(Opcode); in emitBinary()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2462 Inst.setOpcode(ARM::RFEDA); in DecodeMemMultipleWritebackInstruction()
2465 Inst.setOpcode(ARM::RFEDA_UPD); in DecodeMemMultipleWritebackInstruction()
2468 Inst.setOpcode(ARM::RFEDB); in DecodeMemMultipleWritebackInstruction()
2471 Inst.setOpcode(ARM::RFEDB_UPD); in DecodeMemMultipleWritebackInstruction()
2474 Inst.setOpcode(ARM::RFEIA); in DecodeMemMultipleWritebackInstruction()
2477 Inst.setOpcode(ARM::RFEIA_UPD); in DecodeMemMultipleWritebackInstruction()
2480 Inst.setOpcode(ARM::RFEIB); in DecodeMemMultipleWritebackInstruction()
2483 Inst.setOpcode(ARM::RFEIB_UPD); in DecodeMemMultipleWritebackInstruction()
2486 Inst.setOpcode(ARM::SRSDA); in DecodeMemMultipleWritebackInstruction()
2489 Inst.setOpcode(ARM::SRSDA_UPD); in DecodeMemMultipleWritebackInstruction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp1219 MI.setOpcode(Opcode); in LowerFAULTING_OP()
1248 MOVI.setOpcode(AArch64::MOVID); in emitFMov0()
1257 FMov.setOpcode(AArch64::FMOVWHr); in emitFMov0()
1262 FMov.setOpcode(AArch64::FMOVWSr); in emitFMov0()
1267 FMov.setOpcode(AArch64::FMOVXDr); in emitFMov0()
1343 MovZ.setOpcode(AArch64::MOVZXi); in emitInstruction()
1350 MovK.setOpcode(AArch64::MOVKXi); in emitInstruction()
1364 TmpInst.setOpcode(AArch64::MOVIv16b_ns); in emitInstruction()
1413 TmpInst.setOpcode(AArch64::BR); in emitInstruction()
1422 TmpInst.setOpcode(AArch64::B); in emitInstruction()
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H A DAArch64MCInstLower.cpp327 OutMI.setOpcode(MI->getOpcode()); in Lower()
338 OutMI.setOpcode(AArch64::RET); in Lower()
343 OutMI.setOpcode(AArch64::RET); in Lower()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVMCInstLower.cpp142 OutMI.setOpcode(RVV->BaseInstr); in lowerRISCVVMachineInstrToMCInst()
221 OutMI.setOpcode(MI->getOpcode()); in lowerRISCVMachineInstrToMCInst()
244 OutMI.setOpcode(RISCV::CSRRS); in lowerRISCVMachineInstrToMCInst()
250 OutMI.setOpcode(RISCV::CSRRS); in lowerRISCVMachineInstrToMCInst()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp182 MI.setOpcode(Hexagon::BUNDLE); in getInstruction()
214 MI.setOpcode(Hexagon::S6_allocframe_to_raw); in remapInstruction()
222 MI.setOpcode(L6_deallocframe_map_to_raw); in remapInstruction()
230 MI.setOpcode(L6_return_map_to_raw); in remapInstruction()
238 MI.setOpcode(L4_return_map_to_raw_t); in remapInstruction()
246 MI.setOpcode(L4_return_map_to_raw_f); in remapInstruction()
254 MI.setOpcode(L4_return_map_to_raw_tnew_pt); in remapInstruction()
262 MI.setOpcode(L4_return_map_to_raw_fnew_pt); in remapInstruction()
270 MI.setOpcode(L4_return_map_to_raw_tnew_pnt); in remapInstruction()
278 MI.setOpcode(L4_return_map_to_raw_fnew_pnt); in remapInstruction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp299 ITInst.setOpcode(ARM::t2IT); in flushPendingInstructions()
5790 case ARM::tBcc: Inst.setOpcode(ARM::tB); break; in cvtThumbBranches()
5791 case ARM::t2Bcc: Inst.setOpcode(ARM::t2B); break; in cvtThumbBranches()
5800 Inst.setOpcode(Cond == ARMCC::AL ? ARM::tB : ARM::tBcc); in cvtThumbBranches()
5804 Inst.setOpcode(Cond == ARMCC::AL ? ARM::t2B : ARM::t2Bcc); in cvtThumbBranches()
5815 Inst.setOpcode(ARM::t2B); in cvtThumbBranches()
5822 Inst.setOpcode(ARM::t2Bcc); in cvtThumbBranches()
8738 TmpInst.setOpcode(Opcode); in processInstruction()
8756 TmpInst.setOpcode(ARM::LDRSBTi); in processInstruction()
8758 TmpInst.setOpcode(ARM::LDRHTi); in processInstruction()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp178 TmpInst.setOpcode(Opcode); in emitR()
187 TmpInst.setOpcode(Opcode); in emitRX()
207 TmpInst.setOpcode(Opcode); in emitII()
218 TmpInst.setOpcode(Opcode); in emitRRX()
236 TmpInst.setOpcode(Opcode); in emitRRRX()
256 TmpInst.setOpcode(Opcode); in emitRRIII()
1176 TmpInst.setOpcode(Mips::LUi); in emitDirectiveCpLoad()
1188 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
1201 TmpInst.setOpcode(Mips::ADDu); in emitDirectiveCpLoad()
1304 Inst.setOpcode(Mips::OR); in emitDirectiveCpreturn()
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp37 NopInst.setOpcode(ARM::HINT); in getNop()
42 NopInst.setOpcode(ARM::MOVr); in getNop()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp119 TmpInst0.setOpcode(Mips::JALR64); in emitPseudoIndirectBranch()
124 TmpInst0.setOpcode(Mips::JRC16_MMR6); in emitPseudoIndirectBranch()
126 TmpInst0.setOpcode(Mips::JALR); in emitPseudoIndirectBranch()
131 TmpInst0.setOpcode(Mips::JR_MM); in emitPseudoIndirectBranch()
134 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch()
936 I.setOpcode(Mips::JAL); in EmitJal()
945 I.setOpcode(Opcode); in EmitInstrReg()
964 I.setOpcode(Opcode); in EmitInstrRegReg()
974 I.setOpcode(Opcode); in EmitInstrRegRegReg()
H A DMipsMCInstLower.cpp216 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
254 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
319 OutMI.setOpcode(MI->getOpcode()); in Lower()
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kMCInstLower.cpp147 OutMI.setOpcode(Opcode); in Lower()
168 OutMI.setOpcode(Opcode); in Lower()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp342 Inst.setOpcode(Opcode); in SimplifyShortImmForm()
370 Inst.setOpcode(NewOpcode); in SimplifyMOVSX()
421 Inst.setOpcode(Opcode); in SimplifyShortMoveForm()
499 OutMI.setOpcode(MI->getOpcode()); in Lower()
531 OutMI.setOpcode(NewOpc); in Lower()
572 OutMI.setOpcode(NewOpc); in Lower()
586 OutMI.setOpcode(NewOpc); in Lower()
688 OutMI.setOpcode(NewOpc); in Lower()
760 OutMI.setOpcode(NewOpc); in Lower()
780 OutMI.setOpcode(getRetOpcode(AsmPrinter.getSubtarget())); in Lower()
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/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCInstBuilder.h27 Inst.setOpcode(Opcode); in MCInstBuilder()
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFMCInstLower.cpp48 OutMI.setOpcode(MI->getOpcode()); in Lower()

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