| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 127 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
128 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
129 setIndexedStoreAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
130 setIndexedStoreAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2436 void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, MVT VT, in setIndexedStoreAction() function
2442 void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, ArrayRef<MVT> VTs, in setIndexedStoreAction() function
2445 setIndexedStoreAction(IdxModes, VT, Action); in setIndexedStoreAction()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 771 setIndexedStoreAction(IM, VT, Expand); in initActions()
791 setIndexedStoreAction(IM, VT, Expand); in initActions()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 222 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
223 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
224 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
225 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
226 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
230 setIndexedStoreAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
231 setIndexedStoreAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 917 setIndexedStoreAction(im, MVT::i8, Legal); in AArch64TargetLowering()
918 setIndexedStoreAction(im, MVT::i16, Legal); in AArch64TargetLowering()
919 setIndexedStoreAction(im, MVT::i32, Legal); in AArch64TargetLowering()
920 setIndexedStoreAction(im, MVT::i64, Legal); in AArch64TargetLowering()
921 setIndexedStoreAction(im, MVT::f64, Legal); in AArch64TargetLowering()
922 setIndexedStoreAction(im, MVT::f32, Legal); in AArch64TargetLowering()
923 setIndexedStoreAction(im, MVT::f16, Legal); in AArch64TargetLowering()
924 setIndexedStoreAction(im, MVT::bf16, Legal); in AArch64TargetLowering()
1654 setIndexedStoreAction(im, VT, Legal); in addTypeForNEON()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 318 setIndexedStoreAction(im, VT, Legal); in addMVEVectorTypes()
348 setIndexedStoreAction(im, VT, Legal); in addMVEVectorTypes()
431 setIndexedStoreAction(im, VT, Legal); in addMVEVectorTypes()
1111 setIndexedStoreAction(im, MVT::i1, Legal); in ARMTargetLowering()
1112 setIndexedStoreAction(im, MVT::i8, Legal); in ARMTargetLowering()
1113 setIndexedStoreAction(im, MVT::i16, Legal); in ARMTargetLowering()
1114 setIndexedStoreAction(im, MVT::i32, Legal); in ARMTargetLowering()
1119 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1793 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| H A D | HexagonISelLoweringHVX.cpp | 193 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 1405 * ``setIndexedStoreAction`` --- Indexed store.
|