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Searched refs:reg (Results 1 – 25 of 2160) sorted by relevance

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/openbsd-src/sys/arch/hppa/include/
H A Dasm.h35 r0 .reg %r0
36 r1 .reg %r1
37 r2 .reg %r2
38 r3 .reg %r3
39 r4 .reg %r4
40 r5 .reg %r5
41 r6 .reg %r6
42 r7 .reg %r7
43 r8 .reg %r8
44 r9 .reg %r9
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/openbsd-src/gnu/llvm/compiler-rt/lib/asan/
H A Dasan_rtl_x86_64.S9 #define NAME(n, reg, op, s, i) n##_##op##_##i##_##s##_##reg argument
11 #define FNAME(reg, op, s, i) NAME(__asan_check, reg, op, s, i) argument
12 #define RLABEL(reg, op, s, i) NAME(.return, reg, op, s, i) argument
13 #define CLABEL(reg, op, s, i) NAME(.check, reg, op, s, i) argument
14 #define FLABEL(reg, op, s, i) NAME(.fail, reg, op, s, i) argument
16 #define BEGINF(reg, op, s, i) \ argument
17 .section .text.FNAME(reg, op, s, i),"ax",@progbits ;\
18 .globl FNAME(reg, op, s, i) ;\
19 .hidden FNAME(reg, op, s, i) ;\
20 ASM_TYPE_FUNCTION(FNAME(reg, op, s, i)) ;\
[all …]
/openbsd-src/gnu/usr.bin/binutils-2.17/gas/
H A Dbfin-parse.c440 #define LDIMMHALF_R(reg, h, s, z, hword) \ argument
441 bfin_gen_ldimmhalf (reg, h, s, z, hword, 1)
443 #define LDIMMHALF_R5(reg, h, s, z, hword) \ argument
444 bfin_gen_ldimmhalf (reg, h, s, z, hword, 2)
446 #define LDSTIDXI(ptr, reg, w, sz, z, offset) \ argument
447 bfin_gen_ldstidxi (ptr, reg, w, sz, z, offset)
449 #define LDST(ptr, reg, aop, sz, z, w) \ argument
450 bfin_gen_ldst (ptr, reg, aop, sz, z, w)
452 #define LDSTII(ptr, reg, offset, w, op) \ argument
453 bfin_gen_ldstii (ptr, reg, offset, w, op)
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/openbsd-src/sys/dev/pci/drm/amd/amdgpu/
H A Dsoc15_common.h36 #define SOC15_REG_OFFSET(ip, inst, reg) (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) argument
37 #define SOC15_REG_OFFSET1(ip, inst, reg, offset) \ argument
38 (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg)+(offset))
40 #define __WREG32_SOC15_RLC__(reg, value, flag, hwip, inst) \ argument
42 amdgpu_sriov_wreg(adev, reg, value, flag, hwip, inst) : \
43 WREG32(reg, value))
45 #define __RREG32_SOC15_RLC__(reg, flag, hwip, inst) \ argument
47 amdgpu_sriov_rreg(adev, reg, flag, hwip, inst) : \
48 RREG32(reg))
50 #define WREG32_FIELD15(ip, idx, reg, field, val) \ argument
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/openbsd-src/sys/dev/ic/
H A Dar9285.c200 uint32_t reg, offset = 0x1000; in ar9285_init_from_rom() local
207 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0); in ar9285_init_from_rom()
208 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, modal->iqCalI); in ar9285_init_from_rom()
209 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, modal->iqCalQ); in ar9285_init_from_rom()
210 AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0, reg); in ar9285_init_from_rom()
213 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ); in ar9285_init_from_rom()
214 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, in ar9285_init_from_rom()
216 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9285_init_from_rom()
218 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN, in ar9285_init_from_rom()
220 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_DB, in ar9285_init_from_rom()
[all …]
H A Dar9380.c301 uint32_t reg; in ar9380_init_from_rom() local
311 reg = AR_READ(sc, AR9485_PHY_65NM_CH0_TOP2); in ar9380_init_from_rom()
312 reg = RW(reg, AR9485_PHY_65NM_CH0_TOP2_XPABIASLVL, in ar9380_init_from_rom()
314 AR_WRITE(sc, AR9485_PHY_65NM_CH0_TOP2, reg); in ar9380_init_from_rom()
316 reg = AR_READ(sc, AR_PHY_65NM_CH0_TOP); in ar9380_init_from_rom()
317 reg = RW(reg, AR_PHY_65NM_CH0_TOP_XPABIASLVL, in ar9380_init_from_rom()
319 AR_WRITE(sc, AR_PHY_65NM_CH0_TOP, reg); in ar9380_init_from_rom()
320 reg = AR_READ(sc, AR_PHY_65NM_CH0_THERM); in ar9380_init_from_rom()
321 reg = RW(reg, AR_PHY_65NM_CH0_THERM_XPABIASLVL_MSB, in ar9380_init_from_rom()
323 reg |= AR_PHY_65NM_CH0_THERM_XPASHORT2GND; in ar9380_init_from_rom()
[all …]
H A Dar9280.c179 uint32_t phy, reg, ndiv = 0; in ar9280_set_synth() local
201 reg = AR_READ(sc, AR_PHY_CCK_TX_CTRL); in ar9280_set_synth()
203 reg |= AR_PHY_CCK_TX_CTRL_JAPAN; in ar9280_set_synth()
205 reg &= ~AR_PHY_CCK_TX_CTRL_JAPAN; in ar9280_set_synth()
206 AR_WRITE(sc, AR_PHY_CCK_TX_CTRL, reg); in ar9280_set_synth()
227 reg = AR_READ(sc, AR_AN_SYNTH9); in ar9280_set_synth()
228 reg = RW(reg, AR_AN_SYNTH9_REFDIVA, 1); in ar9280_set_synth()
229 AR_WRITE(sc, AR_AN_SYNTH9, reg); in ar9280_set_synth()
246 uint32_t reg, offset; in ar9280_init_from_rom() local
263 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset); in ar9280_init_from_rom()
[all …]
H A Dar9287.c173 uint32_t reg, offset; in ar9287_init_from_rom() local
184 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset); in ar9287_init_from_rom()
185 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, in ar9287_init_from_rom()
187 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, in ar9287_init_from_rom()
189 AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg); in ar9287_init_from_rom()
191 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset); in ar9287_init_from_rom()
192 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, in ar9287_init_from_rom()
194 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9287_init_from_rom()
196 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg); in ar9287_init_from_rom()
198 reg = AR_READ(sc, AR_PHY_RXGAIN + offset); in ar9287_init_from_rom()
[all …]
/openbsd-src/sys/dev/pci/drm/amd/display/dc/inc/
H A Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
68 REG_SET_N(reg, 2, init_value, \
69 FN(reg, f1), v1,\
70 FN(reg, f2), v2)
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
73 REG_SET_N(reg, 3, init_value, \
74 FN(reg, f1), v1,\
75 FN(reg, f2), v2,\
76 FN(reg, f3), v3)
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
[all …]
/openbsd-src/sys/arch/i386/pci/
H A Dpci_bus_fixup.c54 pcireg_t reg; in pci_bus_check() local
62 reg = pci_conf_read(pc, tag, PCI_ID_REG); in pci_bus_check()
69 if (PCI_VENDOR(reg) == PCI_VENDOR_INVALID) in pci_bus_check()
72 if (PCI_VENDOR(reg) == 0) in pci_bus_check()
75 qd = pci_lookup_quirkdata(PCI_VENDOR(reg), PCI_PRODUCT(reg)); in pci_bus_check()
77 reg = pci_conf_read(pc, tag, PCI_BHLC_REG); in pci_bus_check()
78 if (PCI_HDRTYPE_MULTIFN(reg) || in pci_bus_check()
87 reg = pci_conf_read(pc, tag, PCI_ID_REG); in pci_bus_check()
90 if (PCI_VENDOR(reg) == PCI_VENDOR_INVALID) in pci_bus_check()
93 if (PCI_VENDOR(reg) == 0) in pci_bus_check()
[all …]
/openbsd-src/sys/dev/fdt/
H A Damlclock.c106 #define HREAD4(sc, reg) \ argument
107 (regmap_read_4((sc)->sc_rm, (reg) << 2))
108 #define HWRITE4(sc, reg, val) \ argument
109 regmap_write_4((sc)->sc_rm, (reg) << 2, (val))
110 #define HSET4(sc, reg, bits) \ argument
111 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
112 #define HCLR4(sc, reg, bits) \ argument
113 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
116 uint8_t reg; member
208 uint32_t reg, mux, div; in amlclock_get_cpu_freq() local
[all …]
H A Damlpciephy.c45 #define HREAD4(sc, reg) \ argument
46 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
47 #define HWRITE4(sc, reg, val) \ argument
48 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
49 #define HSET4(sc, reg, bits) \ argument
50 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
51 #define HCLR4(sc, reg, bits) \ argument
52 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
117 uint32_t reg; in amlpciephy_enable() local
129 reg = HREAD4(sc, PHY_R0); in amlpciephy_enable()
[all …]
H A Dsxiccmu.c48 uint16_t reg; member
584 uint32_t reg[2]; in sxiccmu_attach_clock() local
597 if (OF_getpropintarray(node, "reg", reg, sizeof(reg)) == sizeof(reg)) { in sxiccmu_attach_clock()
598 error = bus_space_map(clock->sc_iot, reg[0], reg[1], 0, in sxiccmu_attach_clock()
663 uint32_t reg, k, m, n, freq; in sxiccmu_pll6_get_frequency() local
667 reg = SXIREAD4(sc, 0); in sxiccmu_pll6_get_frequency()
668 k = CCU_PLL6_FACTOR_K(reg) + 1; in sxiccmu_pll6_get_frequency()
669 m = CCU_PLL6_FACTOR_M(reg) + 1; in sxiccmu_pll6_get_frequency()
670 n = CCU_PLL6_FACTOR_N(reg); in sxiccmu_pll6_get_frequency()
692 uint32_t reg; in sxiccmu_pll6_enable() local
[all …]
H A Damldwusb.c105 #define HREAD4(sc, reg) \ argument
106 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
107 #define HWRITE4(sc, reg, val) \ argument
108 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
109 #define HSET4(sc, reg, bits) \ argument
110 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
111 #define HCLR4(sc, reg, bits) \ argument
112 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
148 uint32_t reg; in amldwusb_attach() local
175 reg = HREAD4(sc, USB_R1); in amldwusb_attach()
[all …]
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.h137 #define PHM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT argument
138 #define PHM_FIELD_MASK(reg, field) reg##__##field##_MASK argument
140 #define PHM_SET_FIELD(origval, reg, field, fieldval) \ argument
141 (((origval) & ~PHM_FIELD_MASK(reg, field)) | \
142 (PHM_FIELD_MASK(reg, field) & ((fieldval) << PHM_FIELD_SHIFT(reg, field))))
144 #define PHM_GET_FIELD(value, reg, field) \ argument
145 (((value) & PHM_FIELD_MASK(reg, field)) >> \
146 PHM_FIELD_SHIFT(reg, field))
151 #define PHM_READ_FIELD(device, reg, field) \ argument
152 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)
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/openbsd-src/gnu/gcc/gcc/config/i386/
H A Dlinux-unwind.h70 fs->regs.reg[0].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
71 fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa; in x86_64_fallback_frame_state()
72 fs->regs.reg[1].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
73 fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa; in x86_64_fallback_frame_state()
74 fs->regs.reg[2].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
75 fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa; in x86_64_fallback_frame_state()
76 fs->regs.reg[3].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
77 fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa; in x86_64_fallback_frame_state()
78 fs->regs.reg[4].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
79 fs->regs.reg[4].loc.offset = (long)&sc->rsi - new_cfa; in x86_64_fallback_frame_state()
[all …]
/openbsd-src/gnu/usr.bin/gcc/gcc/config/i386/
H A Dlinux64.h128 (FS)->regs.reg[0].how = REG_SAVED_OFFSET; \
129 (FS)->regs.reg[0].loc.offset = (long)&sc_->rax - new_cfa_; \
130 (FS)->regs.reg[1].how = REG_SAVED_OFFSET; \
131 (FS)->regs.reg[1].loc.offset = (long)&sc_->rdx - new_cfa_; \
132 (FS)->regs.reg[2].how = REG_SAVED_OFFSET; \
133 (FS)->regs.reg[2].loc.offset = (long)&sc_->rcx - new_cfa_; \
134 (FS)->regs.reg[3].how = REG_SAVED_OFFSET; \
135 (FS)->regs.reg[3].loc.offset = (long)&sc_->rbx - new_cfa_; \
136 (FS)->regs.reg[4].how = REG_SAVED_OFFSET; \
137 (FS)->regs.reg[4].loc.offset = (long)&sc_->rsi - new_cfa_; \
[all …]
/openbsd-src/sys/dev/pci/drm/amd/display/dmub/src/
H A Ddmub_reg.h43 #define REG(reg) (REGS)->offset.reg argument
51 #define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg))) argument
53 #define REG_WRITE(reg, val) \ argument
54 ((CTX)->funcs.reg_write((CTX)->user_ctx, REG(reg), (val)))
65 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
66 REG_SET_N(reg, 2, init_value, \
67 FN(reg, f1), v1, \
68 FN(reg, f2), v2)
70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
71 REG_SET_N(reg, 3, init_value, \
[all …]
/openbsd-src/sys/dev/pci/drm/i915/display/
H A Dintel_de.h14 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read() argument
16 return intel_uncore_read(&i915->uncore, reg); in intel_de_read()
20 intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read8() argument
22 return intel_uncore_read8(&i915->uncore, reg); in intel_de_read8()
33 intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_posting_read() argument
35 intel_uncore_posting_read(&i915->uncore, reg); in intel_de_posting_read()
39 intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) in intel_de_write() argument
41 intel_uncore_write(&i915->uncore, reg, val); in intel_de_write()
45 intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) in intel_de_rmw() argument
47 return intel_uncore_rmw(&i915->uncore, reg, clear, set); in intel_de_rmw()
[all …]
/openbsd-src/gnu/usr.bin/binutils/gas/
H A Dm68k-parse.c90 enum m68k_register reg; member
1080 op->reg = yyvsp[0].reg; in yyparse()
1087 op->reg = yyvsp[0].reg; in yyparse()
1094 op->reg = yyvsp[0].reg; in yyparse()
1101 op->reg = yyvsp[0].reg; in yyparse()
1108 op->reg = yyvsp[0].reg; in yyparse()
1143 op->reg = yyvsp[-1].reg; in yyparse()
1150 op->reg = yyvsp[-2].reg; in yyparse()
1157 op->reg = yyvsp[-1].reg; in yyparse()
1163 op->reg = yyvsp[-1].reg; in yyparse()
[all …]
/openbsd-src/sys/arch/powerpc/include/
H A Dasm.h79 # define RETGUARD_LOAD_RANDOM(x, reg) \ argument
81 66: mflr reg; \
82 addis reg, reg, (__retguard_ ## x - 66b)@ha; \
83 lwz reg, ((__retguard_ ## x - 66b)@l)(reg)
85 # define RETGUARD_LOAD_RANDOM(x, reg) \ argument
86 lis reg, (__retguard_ ## x)@ha; \
87 lwz reg, ((__retguard_ ## x)@l)(reg)
89 # define RETGUARD_SETUP(x, reg, retreg) \ argument
91 RETGUARD_SETUP_LATE(x, reg, retreg)
92 # define RETGUARD_SETUP_LATE(x, reg, retreg) \ argument
[all …]
/openbsd-src/gnu/usr.bin/binutils/gdb/
H A Duser-regs.c62 user_reg_read_ftype *read, struct user_reg *reg) in append_user_reg() argument
67 gdb_assert (reg != NULL); in append_user_reg()
68 reg->name = name; in append_user_reg()
69 reg->read = read; in append_user_reg()
70 reg->next = NULL; in append_user_reg()
71 (*regs->last) = reg; in append_user_reg()
94 struct user_reg *reg; in user_regs_init() local
97 for (reg = builtin_user_regs.first; reg != NULL; reg = reg->next) in user_regs_init()
98 append_user_reg (regs, reg->name, reg->read, in user_regs_init()
147 struct user_reg *reg; in user_reg_map_name_to_regnum() local
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/openbsd-src/gnu/usr.bin/binutils/gdb/gdbserver/
H A DMakefile.in201 rm -f reg-arm.c reg-i386.c reg-ia64.c reg-m68k.c reg-mips.c
202 rm -f reg-ppc.c reg-sh.c reg-x86-64.c reg-i386-linux.c
272 reg-arm.o : reg-arm.c $(regdef_h)
273 reg-arm.c : $(srcdir)/../regformats/reg-arm.dat $(regdat_sh)
274 sh $(regdat_sh) $(srcdir)/../regformats/reg-arm.dat reg-arm.c
275 reg-i386.o : reg-i386.c $(regdef_h)
276 reg-i386.c : $(srcdir)/../regformats/reg-i386.dat $(regdat_sh)
277 sh $(regdat_sh) $(srcdir)/../regformats/reg-i386.dat reg-i386.c
278 reg-i386-linux.o : reg-i386-linux.c $(regdef_h)
279 reg-i386-linux.c : $(srcdir)/../regformats/reg-i386-linux.dat $(regdat_sh)
[all …]
/openbsd-src/sys/dev/pci/
H A Dif_vgevar.h99 #define CSR_WRITE_4(sc, reg, val) \ argument
100 bus_space_write_4(sc->vge_btag, sc->vge_bhandle, reg, val)
101 #define CSR_WRITE_2(sc, reg, val) \ argument
102 bus_space_write_2(sc->vge_btag, sc->vge_bhandle, reg, val)
103 #define CSR_WRITE_1(sc, reg, val) \ argument
104 bus_space_write_1(sc->vge_btag, sc->vge_bhandle, reg, val)
106 #define CSR_READ_4(sc, reg) \ argument
107 bus_space_read_4(sc->vge_btag, sc->vge_bhandle, reg)
108 #define CSR_READ_2(sc, reg) \ argument
109 bus_space_read_2(sc->vge_btag, sc->vge_bhandle, reg)
[all …]
/openbsd-src/usr.sbin/pcidump/
H A Dpcidump.c604 u_int32_t reg; in dump_msi() local
606 if (pci_read(bus, dev, func, ptr, &reg) != 0) in dump_msi()
610 reg & PCI_MSI_MC_MSIE ? "yes" : "no", in dump_msi()
611 (1 << ((reg & PCI_MSI_MC_MMC_MASK) >> PCI_MSI_MC_MMC_SHIFT)), in dump_msi()
612 (1 << ((reg & PCI_MSI_MC_MME_MASK) >> PCI_MSI_MC_MME_SHIFT))); in dump_msi()
618 u_int32_t reg; in dump_msix() local
621 if ((pci_read(bus, dev, func, ptr, &reg) != 0) || in dump_msix()
626 reg & PCI_MSIX_MC_MSIXE ? "yes" : "no", in dump_msix()
627 PCI_MSIX_MC_TBLSZ(reg) + 1, in dump_msix()
635 u_int32_t reg; in dump_pcie_enhanced_caplist() local
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