Home
last modified time | relevance | path

Searched refs:pptable (Results 1 – 25 of 28) sorted by relevance

12

/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_processpptables.c66 static void dump_pptable(PPTable_t *pptable)
70 pr_info("Version = 0x%08x\n", pptable->Version);
72 pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
73 pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
75 pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
76 pr_info("SocketPowerLimitAc0Tau = %d\n", pptable->SocketPowerLimitAc0Tau);
77 pr_info("SocketPowerLimitAc1 = %d\n", pptable->SocketPowerLimitAc1);
78 pr_info("SocketPowerLimitAc1Tau = %d\n", pptable->SocketPowerLimitAc1Tau);
79 pr_info("SocketPowerLimitAc2 = %d\n", pptable->SocketPowerLimitAc2);
80 pr_info("SocketPowerLimitAc2Tau = %d\n", pptable->SocketPowerLimitAc2Tau);
[all …]
H A Dprocess_pptables_v1_0.c205 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_platform_power_management_table()
248 …t phm_ppt_v1_information *pp_table_information = (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_dpm_2_parameters()
484 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_pcie_table()
762 (struct phm_ppt_v1_information *)(hwmgr->pptable); in get_gpio_table()
794 (struct phm_ppt_v1_information *)(hwmgr->pptable); in init_clock_voltage_dependency()
1146 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v1_information), GFP_KERNEL); in pp_tables_v1_0_initialize()
1148 PP_ASSERT_WITH_CODE((NULL != hwmgr->pptable), in pp_tables_v1_0_initialize()
1193 (struct phm_ppt_v1_information *)(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1231 kfree(hwmgr->pptable); in pp_tables_v1_0_uninitialize()
1232 hwmgr->pptable = NULL; in pp_tables_v1_0_uninitialize()
[all …]
H A Dvega12_processpptables.c195 (struct phm_ppt_v3_information *)hwmgr->pptable; in init_powerplay_table_information()
266 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL); in vega12_pp_tables_initialize()
267 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega12_pp_tables_initialize()
293 (struct phm_ppt_v3_information *)(hwmgr->pptable); in vega12_pp_tables_uninitialize()
310 kfree(hwmgr->pptable); in vega12_pp_tables_uninitialize()
311 hwmgr->pptable = NULL; in vega12_pp_tables_uninitialize()
H A Dvega10_hwmgr.c197 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_set_features_platform_caps()
307 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_odn_initial_default_setting()
531 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_get_socclk_for_voltage_evv()
568 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_get_evv_voltages()
673 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_patch_voltage_dependency_tables_with_lookup_table()
749 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_complete_dependency_tables()
778 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_set_private_data_based_on_pptable()
910 /* Parse pptable data read from VBIOS */ in vega10_hwmgr_backend_init()
1174 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega10_construct_voltage_tables()
1263 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_setup_default_pcie_table()
4655 PPTable_t *pptable = &(data->smc_state_table.pp_table); vega10_emit_clock_levels() local
4801 PPTable_t *pptable = &(data->smc_state_table.pp_table); vega10_print_clock_levels() local
[all...]
H A Dvega10_processpptables.c789 (struct phm_ppt_v2_information *)(hwmgr->pptable); in get_pcie_table()
877 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_powerplay_extended_tables()
1065 (struct phm_ppt_v2_information *)(hwmgr->pptable); in init_dpm_2_parameters()
1152 hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v2_information), GFP_KERNEL); in vega10_pp_tables_initialize()
1154 PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL), in vega10_pp_tables_initialize()
1199 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1237 kfree(hwmgr->pptable); in vega10_pp_tables_uninitialize()
1238 hwmgr->pptable = NULL; in vega10_pp_tables_uninitialize()
H A Dsmu7_hwmgr.c320 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_construct_voltage_tables()
639 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_default_pcie_table()
871 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_dpm_tables_v1()
937 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_odn_initial_default_setting()
982 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_setup_voltage_range_from_vbios()
1010 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_check_dpm_table_updated()
1537 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_populate_umdpstate_clocks()
1805 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_init_dpm_defaults()
2054 (struct phm_ppt_v1_information *)hwmgr->pptable; in smu7_get_evv_voltages()
2191 (struct phm_ppt_v1_information *)(hwmgr->pptable); in smu7_patch_clock_voltage_limits_with_vddc_leakage()
[all...]
H A Dsmu_helper.c467 (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_get_sclk_for_voltage_evv()
496 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in phm_initializa_dynamic_state_adjustment_rule_settings()
548 (struct phm_ppt_v1_information *)hwmgr->pptable; in phm_apply_dal_min_voltage_request()
H A Dvega12_thermal.c174 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega12_thermal_set_temperature_range()
H A Dvega20_thermal.c245 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_thermal_set_temperature_range()
H A Dvega20_hwmgr.c468 /* Parse pptable data read from VBIOS */ in vega20_hwmgr_backend_init()
798 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_init_smc_table()
893 /* update the pptable */ in vega20_override_pcie_parameters()
1051 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_set_feature_capabilities()
1251 (struct phm_ppt_v3_information *)hwmgr->pptable; in vega20_od8_initialize_default_settings()
2804 (struct phm_ppt_v2_information *)hwmgr->pptable; in vega20_get_sclks()
3374 PPTable_t *pptable = &(data->smc_state_table.pp_table); in vega20_print_clock_levels()
3473 gen_speed = pptable->PcieGenSpeed[i]; in vega20_print_clock_levels()
3474 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
3487 pptable in vega20_print_clock_levels()
3363 PPTable_t *pptable = &(data->smc_state_table.pp_table); vega20_print_clock_levels() local
[all...]
H A Dvega10_thermal.c363 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_thermal_set_temperature_range()
H A Dvega10_powertune.c1240 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_initialize_power_tune_defaults()
1291 (struct phm_ppt_v2_information *)(hwmgr->pptable); in vega10_enable_power_containment()
H A Dsmu10_hwmgr.c470 struct smu10_voltage_dependency_table **pptable, in smu10_get_clock_voltage_dependency_table() argument
488 *pptable = ptable; in smu10_get_clock_voltage_dependency_table()
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/smu11/
H A Dsienna_cichlid_ppt.c395 PPTable_t *pptable = table_context->driver_pptable; in sienna_cichlid_check_fan_support() local
396 uint64_t features = *(uint64_t *) pptable->FeaturesToRun; in sienna_cichlid_check_fan_support()
2483 PPTable_beige_goby_t *pptable = table_context->driver_pptable; in beige_goby_dump_pptable() local
2488 dev_info(smu->adev->dev, "Version = 0x%08x\n", pptable->Version); in beige_goby_dump_pptable()
2489 dev_info(smu->adev->dev, "FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]); in beige_goby_dump_pptable()
2490 dev_info(smu->adev->dev, "FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]); in beige_goby_dump_pptable()
2493 dev_info(smu->adev->dev, "SocketPowerLimitAc[%d] = 0x%x\n", i, pptable->SocketPowerLimitAc[i]); in beige_goby_dump_pptable()
2494 …dev_info(smu->adev->dev, "SocketPowerLimitAcTau[%d] = 0x%x\n", i, pptable->SocketPowerLimitAcTau[i… in beige_goby_dump_pptable()
2495 dev_info(smu->adev->dev, "SocketPowerLimitDc[%d] = 0x%x\n", i, pptable->SocketPowerLimitDc[i]); in beige_goby_dump_pptable()
2496 …dev_info(smu->adev->dev, "SocketPowerLimitDcTau[%d] = 0x%x\n", i, pptable->SocketPowerLimitDcTau[i… in beige_goby_dump_pptable()
[all …]
H A Darcturus_ppt.c430 PPTable_t *pptable = table_context->driver_pptable; in arcturus_check_fan_support() local
434 !(pptable->FeaturesToRun[0] & FEATURE_FAN_CONTROL_MASK); in arcturus_check_fan_support()
1078 PPTable_t *pptable = smu->smu_table.driver_pptable; in arcturus_get_thermal_temperature_range() local
1085 range->max = pptable->TedgeLimit * in arcturus_get_thermal_temperature_range()
1087 range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) * in arcturus_get_thermal_temperature_range()
1089 range->hotspot_crit_max = pptable->ThotspotLimit * in arcturus_get_thermal_temperature_range()
1091 range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) * in arcturus_get_thermal_temperature_range()
1093 range->mem_crit_max = pptable->TmemLimit * in arcturus_get_thermal_temperature_range()
1095 range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_MEM)* in arcturus_get_thermal_temperature_range()
1107 PPTable_t *pptable = table_context->driver_pptable; in arcturus_read_sensor() local
[all …]
H A Dnavi10_ppt.c1227 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_is_support_fine_grained_dpm() local
1237 dpm_desc = &pptable->DpmDescriptor[clk_index]; in navi10_is_support_fine_grained_dpm()
1272 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_emit_clk_levels()
1357 pptable->LclkFreq[i], in navi10_emit_clk_levels()
1483 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; in navi10_print_clk_levels()
1561 pptable->LclkFreq[i], in navi10_print_clk_levels()
1916 PPTable_t *pptable = smu->smu_table.driver_pptable; in navi10_get_power_profile_mode()
1918 smu->fan_max_rpm = pptable->FanMaximumRpm; in navi10_get_power_profile_mode()
2198 PPTable_t *pptable = table_context->driver_pptable; in navi10_read_sensor()
2205 *(uint32_t *)data = pptable in navi10_read_sensor()
1269 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; navi10_emit_clk_levels() local
1476 PPTable_t *pptable = (PPTable_t *)table_context->driver_pptable; navi10_print_clk_levels() local
1901 PPTable_t *pptable = smu->smu_table.driver_pptable; navi10_get_fan_parameters() local
2183 PPTable_t *pptable = table_context->driver_pptable; navi10_read_sensor() local
2287 PPTable_t *pptable = smu->smu_table.driver_pptable; navi10_get_thermal_temperature_range() local
2343 PPTable_t *pptable = smu->smu_table.driver_pptable; navi10_get_power_limit() local
2383 PPTable_t *pptable = smu->smu_table.driver_pptable; navi10_update_pcie_parameters() local
[all...]
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c293 /* pptable will handle the features to enable */ in smu_v13_0_6_get_allowed_feature_mask()
333 struct PPTable_t *pptable = in smu_v13_0_6_setup_driver_pptable() local
338 if (!pptable->Init) { in smu_v13_0_6_setup_driver_pptable()
354 pptable->MaxSocketPowerLimit = in smu_v13_0_6_setup_driver_pptable()
356 pptable->MaxGfxclkFrequency = in smu_v13_0_6_setup_driver_pptable()
358 pptable->MinGfxclkFrequency = in smu_v13_0_6_setup_driver_pptable()
362 pptable->FclkFrequencyTable[i] = in smu_v13_0_6_setup_driver_pptable()
364 pptable->UclkFrequencyTable[i] = in smu_v13_0_6_setup_driver_pptable()
366 pptable->SocclkFrequencyTable[i] = SMUQ10_TO_UINT( in smu_v13_0_6_setup_driver_pptable()
368 pptable in smu_v13_0_6_setup_driver_pptable()
390 struct PPTable_t *pptable = smu_v13_0_6_get_dpm_ultimate_freq() local
488 struct PPTable_t *pptable = smu_v13_0_6_set_default_dpm_table() local
1238 struct PPTable_t *pptable = smu_v13_0_6_get_power_limit() local
1855 struct PPTable_t *pptable = smu_v13_0_6_get_unique_id() local
[all...]
H A Dsmu_v13_0_0_ppt.c343 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_check_powerplay_table() local
345 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_check_powerplay_table()
347 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_0_check_powerplay_table()
349 &pptable->SkuTable.OverDriveLimitsMin; in smu_v13_0_0_check_powerplay_table()
385 !(pptable->SkuTable.FeaturesToRun[0] & (1 << FEATURE_FAN_CONTROL_BIT)); in smu_v13_0_0_check_powerplay_table()
572 PPTable_t *pptable = table_context->driver_pptable; in smu_v13_0_0_set_default_dpm_table() local
573 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_set_default_dpm_table()
728 PPTable_t *pptable = table_context->driver_pptable; in smu_v13_0_0_dump_pptable() local
729 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_0_dump_pptable()
1062 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_0_is_od_feature_supported() local
[all …]
H A Dsmu_v13_0_7_ppt.c460 * With SCPM enabled, the pptable used will be signed. It cannot in smu_v13_0_7_setup_pptable()
461 * be used directly by driver. To get the raw pptable, we need to in smu_v13_0_7_setup_pptable()
462 * rely on the combo pptable(and its revelant SMU message). in smu_v13_0_7_setup_pptable()
718 PPTable_t *pptable = table_context->driver_pptable; in smu_v13_0_7_dump_pptable() local
719 SkuTable_t *skutable = &pptable->SkuTable; in smu_v13_0_7_dump_pptable()
1043 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_is_od_feature_supported() local
1045 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_7_is_od_feature_supported()
1055 PPTable_t *pptable = smu->smu_table.driver_pptable; in smu_v13_0_7_get_od_setting_limits() local
1057 &pptable->SkuTable.OverDriveLimitsBasicMax; in smu_v13_0_7_get_od_setting_limits()
1059 &pptable in smu_v13_0_7_get_od_setting_limits()
1652 PPTable_t *pptable = smu->smu_table.driver_pptable; smu_v13_0_7_get_thermal_temperature_range() local
1851 PPTable_t *pptable = table_context->driver_pptable; smu_v13_0_7_populate_umd_state_clk() local
1927 PPTable_t *pptable = table_context->driver_pptable; smu_v13_0_7_enable_mgpu_fan_boost() local
1951 PPTable_t *pptable = table_context->driver_pptable; smu_v13_0_7_get_power_limit() local
[all...]
H A Daldebaran_ppt.c303 /* pptable will handle the features to enable */ in aldebaran_get_allowed_feature_mask()
313 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_set_default_dpm_table() local
337 dpm_table->dpm_levels[0].value = pptable->GfxclkFmin; in aldebaran_set_default_dpm_table()
339 dpm_table->dpm_levels[1].value = pptable->GfxclkFmax; in aldebaran_set_default_dpm_table()
439 /* VBIOS pptable is the first choice */ in aldebaran_setup_pptable()
1053 PPTable_t *pptable = smu->smu_table.driver_pptable; in aldebaran_get_thermal_temperature_range() local
1060 range->hotspot_crit_max = pptable->ThotspotLimit * in aldebaran_get_thermal_temperature_range()
1062 range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) * in aldebaran_get_thermal_temperature_range()
1064 range->mem_crit_max = pptable->TmemLimit * in aldebaran_get_thermal_temperature_range()
1066 range->mem_emergency_max = (pptable in aldebaran_get_thermal_temperature_range()
1196 PPTable_t *pptable = smu->smu_table.driver_pptable; aldebaran_get_power_limit() local
[all...]
/openbsd-src/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c335 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_uvd_smc_table()
368 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_vce_smc_table()
400 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_update_bif_smc_table()
435 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_initialize_power_tune_defaults()
507 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_cac_table()
544 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_ulv_level()
817 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_graphic_level()
870 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_all_graphic_levels()
986 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_single_memory_level()
1090 (struct phm_ppt_v1_information *)(hwmgr->pptable); in vegam_populate_mvdd_value()
[all …]
H A Dpolaris10_smumgr.c434 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_parameters_in_dpm_table()
508 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_tdc_limit()
588 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_bapm_vddc_base_leakage_sidd()
748 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_cac_table()
783 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_ulv_level()
963 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_graphic_level()
1042 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_all_graphic_levels()
1158 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_single_memory_level()
1257 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_mvdd_value()
1284 (struct phm_ppt_v1_information *)(hwmgr->pptable); in polaris10_populate_smc_acpi_level()
[all …]
H A Dfiji_smumgr.c471 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_initialize_power_tune_defaults()
493 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_parameters_in_dpm_table()
587 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_tdc_limit()
673 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_bapm_vddc_base_leakage_sidd()
761 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_cac_table()
801 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_ulv_level()
944 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_graphic_level()
1006 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_all_graphic_levels()
1166 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_single_memory_level()
1276 (struct phm_ppt_v1_information *)(hwmgr->pptable); in fiji_populate_mvdd_value()
[all …]
H A Dtonga_smumgr.c253 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_get_dependency_volt_by_clk()
398 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_cac_tables()
483 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_ulv_level()
624 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_graphic_level()
690 struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_all_graphic_levels()
967 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_single_memory_level()
1148 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_mvdd_value()
1316 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_uvd_level()
1376 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_vce_level()
1421 (struct phm_ppt_v1_information *)(hwmgr->pptable); in tonga_populate_smc_acp_level()
[all …]
/openbsd-src/sys/dev/pci/drm/amd/pm/swsmu/
H A Dsmu_cmn.c919 void *pptable = smu->smu_table.driver_pptable; in smu_cmn_write_pptable() local
924 pptable, in smu_cmn_write_pptable()
960 void *pptable = smu->smu_table.combo_pptable; in smu_cmn_get_combo_pptable() local
965 pptable, in smu_cmn_get_combo_pptable()

12