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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonDepInstrInfo.td16 let Inst{13-5} = 0b000000100;
17 let Inst{31-21} = 0b10001100100;
18 let hasNewValue = 1;
19 let opNewValue = 0;
20 let prefersSlot3 = 1;
27 let Inst{13-5} = 0b000000110;
28 let Inst{31-21} = 0b10000000100;
29 let prefersSlot3 = 1;
36 let Inst{13-5} = 0b000000101;
37 let Inst{31-21} = 0b10001100100;
[all …]
H A DHexagonDepInstrFormats.td13 let Inst{12-8} = Vu32{4-0};
15 let Inst{20-16} = Rt32{4-0};
17 let Inst{4-0} = Vdd32{4-0};
21 let Inst{11-5} = Ii{6-0};
23 let Inst{20-16} = Rs32{4-0};
25 let Inst{1-0} = Pd4{1-0};
29 let Inst{20-16} = Rss32{4-0};
31 let Inst{12-8} = Rt32{4-0};
33 let Inst{1-0} = Pd4{1-0};
37 let Inst{21-20} = Ii{10-9};
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H A DHexagonDepOperands.td16 def s6_0ImmOperand : AsmOperandClass { let Name = "s6_0Imm"; let RenderMethod = "addSignedImmOperan…
17 def s6_0Imm : Operand<i32> { let ParserMatchClass = s6_0ImmOperand; let DecoderMethod = "s6_0ImmDec…
19 def s32_0ImmOperand : AsmOperandClass { let Name = "s32_0Imm"; let RenderMethod = "addSignedImmOper…
20 def s32_0Imm : Operand<i32> { let ParserMatchClass = s32_0ImmOperand; let DecoderMethod = "s32_0Imm…
22 def u10_0ImmOperand : AsmOperandClass { let Name = "u10_0Imm"; let RenderMethod = "addImmOperands";…
23 def u10_0Imm : Operand<i32> { let ParserMatchClass = u10_0ImmOperand; let DecoderMethod = "unsigned…
25 def u32_0ImmOperand : AsmOperandClass { let Name = "u32_0Imm"; let RenderMethod = "addImmOperands";…
26 def u32_0Imm : Operand<i32> { let ParserMatchClass = u32_0ImmOperand; let DecoderMethod = "unsigned…
28 def m32_0ImmOperand : AsmOperandClass { let Name = "m32_0Imm"; let RenderMethod = "addImmOperands";…
29 def m32_0Imm : Operand<i32> { let ParserMatchClass = m32_0ImmOperand; let DecoderMethod = "unsigned…
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMicroMipsInstrFormats.td24 let Namespace = "Mips";
25 let DecoderNamespace = "MicroMips";
27 let OutOperandList = outs;
28 let InOperandList = ins;
30 let AsmString = asmstr;
31 let Pattern = pattern;
32 let Itinerary = itin;
34 let EncodingPredicates = [InMicroMips];
46 let Size = 2;
63 let Inst{15-10} = 0x01;
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H A DMicroMips32r6InstrFormats.td42 let Inst{15-10} = 0x33;
43 let Inst{9-0} = offset;
52 let Inst{15-10} = op;
53 let Inst{9-7} = rs;
54 let Inst{6-0} = offset;
62 let Inst{15-10} = 0x11;
63 let Inst{9-5} = rs;
64 let Inst{4-0} = op;
74 let Inst{31-26} = 0b011101;
75 let Inst{25-21} = rt;
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H A DMipsMSAInstrFormats.td11 let EncodingPredicates = [HasStdEnc];
12 let Inst{31-26} = 0b011110;
16 let Inst{31-26} = 0b010001;
20 let Inst{31-26} = 0b000000;
26 let EncodingPredicates = [HasStdEnc];
27 let ASEPredicate = [HasMSA];
35 let Inst{25-23} = major;
36 let Inst{22-19} = 0b1110;
37 let Inst{18-16} = m;
38 let Inst{15-11} = ws;
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H A DMipsInstrFormats.td41 let FilterClass = "MMRel";
43 let RowFields = ["BaseOpcode"];
45 let ColFields = ["Arch"];
47 let KeyCol = ["se"];
49 let ValueCols = [["se"], ["micromips"]];
55 let FilterClass = "StdMMR6Rel";
57 let RowFields = ["BaseOpcode"];
59 let ColFields = ["Arch"];
61 let KeyCol = ["se"];
63 let ValueCols = [["se"], ["micromipsr6"]];
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H A DMicroMipsDSPInstrFormats.td11 let ASEPredicate = [HasDSP];
12 let EncodingPredicates = [InMicroMips];
15 let DecoderNamespace = "MicroMips";
20 let ASEPredicate = [HasDSP];
21 let AdditionalPredicates = [InMicroMips];
29 let Inst{31-26} = 0b000000;
30 let Inst{25-21} = rt;
31 let Inst{20-16} = rs;
32 let Inst{15-11} = rd;
33 let Inst{10-0} = op;
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H A DMipsDSPInstrFormats.td12 let FilterClass = "DspMMRel";
14 let RowFields = ["BaseOpcode"];
16 let ColFields = ["Arch"];
18 let KeyCol = ["dsp"];
20 let ValueCols = [["dsp"], ["mmdsp"]];
48 let ASEPredicate = [HasDSP];
56 let ASEPredicate = [HasDSP];
61 let ASEPredicate = [HasDSP];
70 let Opcode = SPECIAL3_OPCODE.V;
72 let Inst{25-21} = rs;
[all …]
H A DMips32r6InstrFormats.td16 let FilterClass = "R6MMR6Rel";
18 let RowFields = ["BaseOpcode"];
20 let ColFields = ["Arch"];
22 let KeyCol = ["mipsr6"];
24 let ValueCols = [["mipsr6"], ["micromipsr6"]];
33 let DecoderNamespace = "Mips32r6_64r6";
34 let EncodingPredicates = [HasStdEnc];
183 let Inst{31-26} = OPGROUP_AUI.Value;
184 let Inst{25-21} = rs;
185 let Inst{20-16} = rt;
[all …]
H A DMips16InstrFormats.td39 let Namespace = "Mips";
41 let OutOperandList = outs;
42 let InOperandList = ins;
44 let AsmString = asmstr;
45 let Pattern = pattern;
46 let Itinerary = itin;
48 let Predicates = [InMips16Mode];
62 let Inst{15-11} = Opcode;
64 let Size=2;
77 let Size=4;
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMScheduleA57WriteRes.td26 def A57Write_5cyc_1M : SchedWriteRes<[A57UnitM]> { let Latency = 5; }
27 def A57Write_5cyc_1V : SchedWriteRes<[A57UnitV]> { let Latency = 5; }
28 def A57Write_5cyc_1W : SchedWriteRes<[A57UnitW]> { let Latency = 5; }
29 def A57Write_10cyc_1V : SchedWriteRes<[A57UnitV]> { let Latency = 10; }
30 def A57Write_17cyc_1W : SchedWriteRes<[A57UnitW]> { let Latency = 17;
31 let ResourceCycles = [17]; }
32 def A57Write_18cyc_1X : SchedWriteRes<[A57UnitX]> { let Latency = 18;
33 let ResourceCycles = [18]; }
34 def A57Write_19cyc_1M : SchedWriteRes<[A57UnitM]> { let Latency = 19;
35 let ResourceCycles = [19]; }
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SchedA57WriteRes.td29 def A57Write_5cyc_1L : SchedWriteRes<[A57UnitL]> { let Latency = 5; }
30 def A57Write_5cyc_1M : SchedWriteRes<[A57UnitM]> { let Latency = 5; }
31 def A57Write_5cyc_1V : SchedWriteRes<[A57UnitV]> { let Latency = 5; }
32 def A57Write_5cyc_1V_FP_Forward : SchedWriteRes<[A57UnitV]> { let Latency = 5; }
33 def A57Write_5cyc_1W : SchedWriteRes<[A57UnitW]> { let Latency = 5; }
34 def A57Write_5cyc_1W_Mul_Forward : SchedWriteRes<[A57UnitW]> { let Latency = 5; }
35 def A57Write_10cyc_1V : SchedWriteRes<[A57UnitV]> { let Latency = 10; }
36 def A57Write_17cyc_1W : SchedWriteRes<[A57UnitW]> { let Latency = 17;
37 let ResourceCycles = [17]; }
38 def A57Write_19cyc_1M : SchedWriteRes<[A57UnitM]> { let Latency = 19;
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H A DAArch64SchedKryoDetails.td16 let Latency = 3; let NumMicroOps = 2;
23 let Latency = 3; let NumMicroOps = 2;
30 let Latency = 4; let NumMicroOps = 3;
36 let Latency = 4; let NumMicroOps = 4;
42 let Latency = 3; let NumMicroOps = 4;
48 let Latency = 3; let NumMicroOps = 2;
54 let Latency = 3; let NumMicroOps = 2;
60 let Latency = 3; let NumMicroOps = 2;
66 let Latency = 3; let NumMicroOps = 2;
72 let Latency = 3; let NumMicroOps = 2;
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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DR600InstrFormats.td19 let SubtargetPredicate = isR600toCayman;
42 let SubtargetPredicate = isR600toCayman;
43 let Namespace = "R600";
44 let OutOperandList = outs;
45 let InOperandList = ins;
46 let AsmString = asm;
47 let Pattern = pattern;
48 let Itinerary = itin;
51 let isCodeGenOnly = 1;
53 let TSFlags{4} = Trig;
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H A DSIInstrFormats.td157 let TSFlags{0} = SALU;
158 let TSFlags{1} = VALU;
160 let TSFlags{2} = SOP1;
161 let TSFlags{3} = SOP2;
162 let TSFlags{4} = SOPC;
163 let TSFlags{5} = SOPK;
164 let TSFlags{6} = SOPP;
166 let TSFlags{7} = VOP1;
167 let TSFlags{8} = VOP2;
168 let TSFlags{9} = VOPC;
[all …]
H A DVOPInstructions.td9 // dummies for outer let
49 let mayLoad = 0;
50 let mayStore = 0;
51 let hasSideEffects = 0;
52 let UseNamedOperandTable = 1;
53 let VALU = 1;
54 let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]);
62 let isPseudo = 1;
63 let isCodeGenOnly = 1;
64 let UseNamedOperandTable = 1;
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/openbsd-src/gnu/llvm/llvm/include/llvm/Target/
H A DGenericOpcodes.td19 let isPreISelOpcode = true;
28 let OutOperandList = baseInst.OutOperandList;
29 let InOperandList = baseInst.InOperandList;
30 let isCommutable = baseInst.isCommutable;
34 let hasSideEffects = true;
35 let mayRaiseFPException = true;
41 let OutOperandList = (outs type0:$dst);
42 let InOperandList = (ins type1:$src);
43 let hasSideEffects = false;
49 let OutOperandList = (outs type0:$dst);
[all …]
/openbsd-src/gnu/llvm/clang/include/clang/Basic/
H A DAttr.td25 let Content = [{
63 let Category = DocCatInternalOnly;
69 let Category = DocCatUndocumented;
70 let Content = "No documentation.";
396 let Arches = arches;
412 let OSes = ["Win32"];
415 let CustomCode = [{ Target.getTriple().hasDLLImportExport() }];
418 let CustomCode = [{ Target.getCXXABI().isItaniumFamily() }];
421 let CustomCode = [{ Target.getCXXABI().isMicrosoft() }];
424 let ObjectFormats = ["ELF"];
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/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCInstrFormats.td17 let Size = 4;
21 let Namespace = "PPC";
22 let Inst{0-5} = opcode;
23 let OutOperandList = OOL;
24 let InOperandList = IOL;
25 let AsmString = asmstr;
26 let Itinerary = itin;
35 let TSFlags{0} = PPC970_First;
36 let TSFlags{1} = PPC970_Single;
37 let TSFlags{2} = PPC970_Cracked;
[all …]
H A DPPCRegisterInfo.td12 let Namespace = "PPC" in {
27 let Namespace = "PPC";
34 let HWEncoding{4-0} = num;
39 let HWEncoding = SubReg.HWEncoding;
40 let SubRegs = [SubReg];
41 let SubRegIndices = [sub_32];
46 let HWEncoding = SubReg.HWEncoding;
47 let SubRegs = [SubReg];
48 let SubRegIndices = [sub_32];
53 let HWEncoding{9-0} = num;
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/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVInstrFormatsV.td63 let Inst{31} = 1;
64 let Inst{30} = 1;
65 let Inst{29-20} = vtypei{9-0};
66 let Inst{19-15} = uimm;
67 let Inst{14-12} = OPCFG.Value;
68 let Inst{11-7} = rd;
69 let Opcode = OPC_OP_V.Value;
71 let Defs = [VTYPE, VL];
80 let Inst{31} = 0;
81 let Inst{30-20} = vtypei;
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/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td13 let Inst{15} = 0;
14 let Inst{14 - 10} = sop;
15 let Inst{9 - 0} = offset;
22 let Inst{15} = 0;
23 let Inst{14 - 10} = sop;
24 let Inst{9 - 0} = offset;
33 let Inst{15 - 11} = 0b01011;
34 let Inst{10 - 8} = rx;
35 let Inst{7 - 5} = rz;
36 let Inst{4 - 2} = ry;
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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86SchedAlderlakeP.td16 let IssueWidth = 6; // Based on allocator width.
17 let MicroOpBufferSize = 512; // Based on the reorder buffer.
18 let LoadLatency = 5;
19 let MispredictPenalty = 14;
25 let LoopMicroOpBufferSize = 72;
29 let CompleteModel = 0;
32 let SchedModel = AlderlakePModel in {
68 let BufferSize = 112;
73 let BufferSize = 48;
79 let BufferSize = 72;
[all …]
/openbsd-src/gnu/llvm/clang/lib/AST/Interp/
H A DOpcodes.td35 def ArgSint8 : ArgType { let Name = "int8_t"; }
36 def ArgUint8 : ArgType { let Name = "uint8_t"; }
37 def ArgSint16 : ArgType { let Name = "int16_t"; }
38 def ArgUint16 : ArgType { let Name = "uint16_t"; }
39 def ArgSint32 : ArgType { let Name = "int32_t"; }
40 def ArgUint32 : ArgType { let Name = "uint32_t"; }
41 def ArgSint64 : ArgType { let Name = "int64_t"; }
42 def ArgUint64 : ArgType { let Name = "uint64_t"; }
43 def ArgBool : ArgType { let Name = "bool"; }
45 def ArgFunction : ArgType { let Name = "const Function *"; }
[all …]

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