| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 416 bool isSub = Opc == sub; variable
417 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
447 bool isSub = Opc == sub; variable
448 return ((int)isSub << 8) | Offset | (IdxMode << 9);
490 bool isSub = Opc == sub; in getAM5Opc() local
491 return ((int)isSub << 8) | Offset; in getAM5Opc()
511 bool isSub = Opc == sub; in getAM5FP16Opc() local
512 return ((int)isSub << 8) | Offset; in getAM5FP16Opc()
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| H A D | ARMInstPrinter.cpp | 378 bool isSub = OffImm < 0; in printThumbLdrLabelOperand() local
383 if (isSub) { in printThumbLdrLabelOperand()
1190 bool isSub = OffImm < 0; in printAddrModeImm12Operand() local
1194 if (isSub) { in printAddrModeImm12Operand()
1214 bool isSub = OffImm < 0; in printT2AddrModeImm8Operand() local
1218 if (isSub) { in printT2AddrModeImm8Operand()
1243 bool isSub = OffImm < 0; in printT2AddrModeImm8s4Operand() local
1250 if (isSub) { in printT2AddrModeImm8s4Operand()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 305 bool isSub = NumBytes < 0; in emitT2RegPlusImmediate() local
306 if (isSub) NumBytes = -NumBytes; in emitT2RegPlusImmediate()
330 if (isSub) { in emitT2RegPlusImmediate()
373 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitT2RegPlusImmediate()
388 Opc = isSub ? t2SUB : t2ADD; in emitT2RegPlusImmediate()
395 Opc = isSub ? t2SUBi12 : t2ADDi12; in emitT2RegPlusImmediate()
541 bool isSub = false; in rewriteT2FrameIndex() local
573 isSub = true; in rewriteT2FrameIndex()
592 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex()
650 isSub = true; in rewriteT2FrameIndex()
[all …]
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| H A D | ThumbRegisterInfo.cpp | 132 bool isSub = false; in emitThumbRegPlusImmInReg() local
138 isSub = true; in emitThumbRegPlusImmInReg()
169 int Opc = (isSub) ? ARM::tSUBrr in emitThumbRegPlusImmInReg()
174 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmInReg()
192 bool isSub = NumBytes < 0; in emitThumbRegPlusImmediate() local
194 if (isSub) Bytes = -NumBytes; in emitThumbRegPlusImmediate()
227 ExtraOpc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate()
233 assert(!isSub && "Thumb1 does not have tSUBrSPi"); in emitThumbRegPlusImmediate()
242 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3; in emitThumbRegPlusImmediate()
250 ExtraOpc = isSub ? ARM::tSUBi8 : ARM::tADDi8; in emitThumbRegPlusImmediate()
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| H A D | ARMBaseInstrInfo.cpp | 221 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
229 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
238 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg) in convertToThreeAddress()
247 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
255 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
260 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
267 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
2497 bool isSub = NumBytes < 0; in emitARMRegPlusImmediate() local
2498 if (isSub) NumBytes = -NumBytes; in emitARMRegPlusImmediate()
2511 unsigned Opc = isSub ? ARM::SUBri : ARM::ADDri; in emitARMRegPlusImmediate()
[all …]
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| H A D | ARMISelLowering.cpp | 11960 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter() local
11962 if (isSub) in EmitInstrWithCustomInserter()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 225 bool isSub = NumBytes < 0; in emitSPUpdate() local
226 uint64_t Offset = isSub ? -NumBytes : NumBytes; in emitSPUpdate()
228 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy; in emitSPUpdate()
251 if (isSub && !isEAXLiveIn(MBB)) in emitSPUpdate()
257 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit); in emitSPUpdate()
281 if (isSub) in emitSPUpdate()
308 unsigned Reg = isSub in emitSPUpdate()
312 unsigned Opc = isSub in emitSPUpdate()
316 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
323 BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue) in emitSPUpdate()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 2288 class BaseBaseAddSubCarry<bit isSub, RegisterClass regtype, string asm,
2297 let Inst{30} = isSub;
2305 class BaseAddSubCarry<bit isSub, RegisterClass regtype, string asm,
2307 : BaseBaseAddSubCarry<isSub, regtype, asm,
2310 class BaseAddSubCarrySetFlags<bit isSub, RegisterClass regtype, string asm,
2312 : BaseBaseAddSubCarry<isSub, regtype, asm,
2318 multiclass AddSubCarry<bit isSub, string asm, string asm_setflags,
2320 def Wr : BaseAddSubCarry<isSub, GPR32, asm, OpNode> {
2324 def Xr : BaseAddSubCarry<isSub, GPR64, asm, OpNode> {
2330 def SWr : BaseAddSubCarrySetFlags<isSub, GPR32, asm_setflags,
[all …]
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| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 3773 bool isSub=false) { in tryEmitFMulAdd() argument
3789 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, false, isSub); in tryEmitFMulAdd()
3794 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub, false); in tryEmitFMulAdd()
3801 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, false, isSub); in tryEmitFMulAdd()
3807 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub, false); in tryEmitFMulAdd()
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