| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepOperands.td | 18 defm s6_0ImmPred : ImmOpPred<[{ return isShiftedInt<6, 0>(N->getSExtValue());}]>; 21 defm s32_0ImmPred : ImmOpPred<[{ return isShiftedInt<32, 0>(N->getSExtValue());}]>; 30 defm m32_0ImmPred : ImmOpPred<[{ return isShiftedInt<32, 0>(N->getSExtValue());}]>; 33 defm b13_2ImmPred : ImmOpPred<[{ return isShiftedInt<13, 2>(N->getSExtValue());}]>; 36 defm b15_2ImmPred : ImmOpPred<[{ return isShiftedInt<15, 2>(N->getSExtValue());}]>; 39 defm a30_2ImmPred : ImmOpPred<[{ return isShiftedInt<32, 2>(N->getSExtValue());}]>; 42 defm b30_2ImmPred : ImmOpPred<[{ return isShiftedInt<32, 2>(N->getSExtValue());}]>; 45 defm s31_1ImmPred : ImmOpPred<[{ return isShiftedInt<32, 1>(N->getSExtValue());}]>; 48 defm s30_2ImmPred : ImmOpPred<[{ return isShiftedInt<32, 2>(N->getSExtValue());}]>; 51 defm s29_3ImmPred : ImmOpPred<[{ return isShiftedInt<32, 3>(N->getSExtValue());}]>; [all …]
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| H A D | HexagonInstrInfo.cpp | 2913 return isShiftedInt<11,1>(Offset); in isValidOffset() 2917 return isShiftedInt<11,2>(Offset); in isValidOffset() 4080 isShiftedInt<6,3>(MI.getOperand(1).getImm())) in getDuplexCandidateGroup()
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| H A D | HexagonPatterns.td | 2638 return isShiftedInt<30,2>(v) && !isShiftedInt<29,3>(v);
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoZicbo.td | 20 ImmLeaf<XLenVT, [{return isShiftedInt<7, 5>(Imm);}]> { 27 return isShiftedInt<7, 5>(Imm);
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| H A D | RISCVInstrInfoC.td | 155 ImmLeaf<XLenVT, [{return isShiftedInt<8, 1>(Imm);}]> { 163 return isShiftedInt<8, 1>(Imm); 203 [{return (Imm != 0) && isShiftedInt<6, 4>(Imm);}]> { 213 return isShiftedInt<6, 4>(Imm) && (Imm != 0); 219 ImmLeaf<XLenVT, [{return isShiftedInt<11, 1>(Imm);}]> { 227 return isShiftedInt<11, 1>(Imm);
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| H A D | RISCVInstrInfoZb.td | 218 return !isInt<13>(C) && !isShiftedInt<20, 12>(C) && isShiftedInt<12, 2>(C); 227 return !isInt<14>(C) && !isShiftedInt<20, 12>(C) && isShiftedInt<12, 3>(C);
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| H A D | RISCVInstrInfo.cpp | 1636 Ok = isShiftedInt<6, 4>(Imm) && (Imm != 0); in verifyInstruction() 1663 Ok = isShiftedInt<7, 5>(Imm); in verifyInstruction()
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| H A D | RISCVInstrInfo.td | 264 return isShiftedInt<12, 1>(Imm); 303 return isShiftedInt<20, 1>(Imm);
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYAsmBackend.cpp | 191 return !isShiftedInt<10, 1>(Offset); in fixupNeedsRelaxationAdvanced() 193 return !isShiftedInt<16, 1>(Offset); in fixupNeedsRelaxationAdvanced() 195 return !isShiftedInt<26, 1>(Offset); in fixupNeedsRelaxationAdvanced()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | loongarch.h | 199 if (!isShiftedInt<26, 2>(Value)) in applyFixup()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 224 return IsConstantImm && isShiftedInt<N, S>(Imm) && in isSImm() 324 ? isShiftedInt<16, 2>(Imm) && IsValidKind in isSImm16lsl2() 402 ? isShiftedInt<21, 2>(Imm) && IsValidKind in isSImm21lsl2() 419 ? isShiftedInt<26, 2>(Imm) && IsValidKind in isSImm26Operand()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCInstrInfo.h | 209 return isShiftedInt<N, S>(minConstant(MCI, Index)); in inSRange()
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| H A D | HexagonMCDuplexInfo.cpp | 546 if (!isShiftedInt<7, 0>(Value)) in subInstWouldBeExtended()
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| /openbsd-src/gnu/llvm/lld/MachO/Arch/ |
| H A D | ARM64.cpp | 267 return ldr.p2Size > 1 && isShiftedInt<19, 2>(ldr.offset); in isLiteralLdrEligible()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Support/ |
| H A D | MathExtras.h | 226 constexpr inline bool isShiftedInt(int64_t x) { in isShiftedInt() function
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 391 IsValid = isShiftedInt<N - 1, 1>(Imm); in isBareSimmNLsb0() 698 return IsConstantImm && isShiftedInt<7, 5>(Imm) && in isSImm12Lsb00000() 710 return IsConstantImm && (Imm != 0) && isShiftedInt<6, 4>(Imm) && in isSImm10Lsb0000NonZero()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 264 return IsConstantImm && isShiftedInt<num, shift>(Imm); in isSImm()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1165 isShiftedInt<7, 3>(NewOffset)) { in matchLDPSTPAddrMode()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 1354 isShiftedInt<Bits, ShiftAmount>(getConstantMemOff()))) in isMemWithSimmOffset() 1358 return IsReloc && isShiftedInt<Bits, ShiftAmount>(Res.getConstant()); in isMemWithSimmOffset() 1405 isShiftedInt<Bits, ShiftLeftAmount>(getConstantImm())) in isScaledSImm() 1413 return Success && isShiftedInt<Bits, ShiftLeftAmount>(Res.getConstant()); in isScaledSImm()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrInfo.td | 116 ImmLeaf<i32, "return isShiftedInt<"#num#", "#shift#">(Imm);"> {
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 251 ImmLeaf<GRLenVT, [{return isShiftedInt<14,2>(Imm);}]> {
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16420 if (isShiftedInt<16, 16>(Value)) in LowerAsmOperandForConstraint()
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