Home
last modified time | relevance | path

Searched refs:isMoveReg (Results 1 – 25 of 30) sorted by relevance

12

/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCInstrDesc.h289 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg() function
/openbsd-src/gnu/llvm/llvm/utils/TableGen/
H A DCodeGenInstruction.h254 bool isMoveReg : 1; variable
H A DCodeGenInstruction.cpp444 isMoveReg = R->getValueAsBit("isMoveReg"); in CodeGenInstruction()
H A DInstrInfoEmitter.cpp1135 if (Inst.isMoveReg) OS << "|(1ULL<<MCID::MoveReg)"; in emitRecord()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td166 let isMoveReg = 1;
173 let isMoveReg = 1;
590 let isMoveReg = 1 in {
594 } // isMoveReg
H A DMips16InstrInfo.cpp101 if (MI.isMoveReg()) in isCopyInstrImpl()
H A DMipsDSPInstrInfo.td455 bit isMoveReg = 1;
466 bit isMoveReg = 1;
510 bit isMoveReg = 1;
520 bit isMoveReg = 1;
H A DMicroMipsInstrInfo.td243 let isMoveReg = 1;
408 let isMoveReg = 1;
415 let isMoveReg = 1;
H A DMicroMipsInstrFPU.td132 let isMoveReg = 1;
H A DMips16InstrInfo.td873 let isMoveReg = 1;
885 let isMoveReg = 1;
897 let isMoveReg = 0;
H A DMipsSEInstrInfo.cpp238 } else if (MI.isMoveReg() || isORCopyInst(MI)) { in isCopyInstrImpl()
H A DMicroMipsDSPInstrInfo.td377 bit isMoveReg = 1;
H A DMipsMSAInstrInfo.td1808 bit isMoveReg = 1;
1903 bit isMoveReg = 1;
2457 bit isMoveReg = 1;
H A DMips64InstrInfo.td417 let isMoveReg = 1 in {
H A DMipsInstrInfo.td1732 let isMoveReg = 1;
1745 let isMoveReg = 1;
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrMMX.td200 let SchedRW = [WriteVecMove], hasSideEffects = 0, isMoveReg = 1 in {
207 } // SchedRW, hasSideEffects, isMoveReg
H A DX86InstrInfo.td1612 let hasSideEffects = 0, isMoveReg = 1 in {
1793 SchedRW = [WriteMove], isMoveReg = 1 in {
1860 let hasSideEffects = 0, isMoveReg = 1 in
H A DX86InstrSSE.td342 let hasSideEffects = 0, isMoveReg = 1 in
440 isMoveReg = 1 in {
515 isMoveReg = 1, SchedRW = [SchedWriteFMoveLS.XMM.RR] in {
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DMachineInstr.h953 bool isMoveReg(QueryType Type = IgnoreBundle) const {
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrVFP.td1124 let isMoveReg = 1 in {
1134 } // isMoveReg
1156 let isMoveReg = 1 in {
1203 } // isMoveReg
H A DARMInstrThumb.td1216 let hasSideEffects = 0, isMoveReg = 1 in {
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoC.td542 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isMoveReg = 1,
H A DRISCVInstrInfo.cpp1237 if (MI.isMoveReg()) in isCopyInstrImpl()
/openbsd-src/gnu/llvm/llvm/include/llvm/Target/
H A DTarget.td550 bit isMoveReg = false; // Is this instruction a move register instruction?
/openbsd-src/gnu/llvm/llvm/docs/TableGen/
H A DProgRef.rst1922 bit isMoveReg = 0;

12