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Searched refs:isDef (Results 1 – 25 of 195) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDag.cpp62 if (E->getFromMO()->isDef() && !E->getToMO()->isDef()) in writeDOTGraph()
66 if (E->getFromMO()->isDef() && !E->getToMO()->isDef()) in writeDOTGraph()
70 if (E->getFromMO()->isDef() == E->getToMO()->isDef()) in writeDOTGraph()
73 if (E->getFromMO()->isDef() == E->getToMO()->isDef()) in writeDOTGraph()
75 else if (E->getFromMO()->isDef() && !E->getToMO()->isDef()) in writeDOTGraph()
H A DGIMatchDagOperands.cpp35 I.value().isDef()); in Profile()
46 if (I.isDef()) in print()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DLiveIntervalCalc.cpp56 if (!MO.isDef() && !MO.readsReg()) in calculate()
73 if (MO.isDef()) in calculate()
81 if (MO.isDef() && !LI.hasSubRanges()) in calculate()
156 if (!MO.readsReg() || (IsSubRange && MO.isDef())) in extendToUses()
162 if (MO.isDef()) in extendToUses()
174 assert(!MO.isDef() && "Cannot handle PHI def of partial register."); in extendToUses()
182 if (MO.isDef()) in extendToUses()
H A DMachineOperand.cpp95 if (isDef()) in substPhysReg()
130 if (isDef()) in isRenamable()
255 void MachineOperand::ChangeToRegister(Register Reg, bool isDef, bool isImp, in ChangeToRegister() argument
269 if (!isDef && MI && MI->isDebugInstr()) in ChangeToRegister()
273 assert(!(isDead && !isDef) && "Dead flag on non-def"); in ChangeToRegister()
274 assert(!(isKill && isDef) && "Kill flag on def"); in ChangeToRegister()
278 IsDef = isDef; in ChangeToRegister()
308 return getReg() == Other.getReg() && isDef() == Other.isDef() && in isIdenticalTo()
375 return hash_combine(MO.getType(), (unsigned)MO.getReg(), MO.getSubReg(), MO.isDef()); in hash_value()
789 OS << (isDef() ? "implicit-def " : "implicit "); in print()
[all …]
H A DMachineUniformityAnalysis.cpp24 if (!op.isReg() || !op.isDef()) in hasDivergentDefs()
39 if (!op.isReg() || !op.isDef()) in markDefsDivergent()
92 if (op.isReg() && op.isDef() && op.getReg().isVirtual()) in pushUsers()
H A DRenameIndependentSubregs.cpp180 if (!MO.isDef() && !MO.readsReg()) in findComponents()
190 Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber()) in findComponents()
219 if (!MO.isDef() && !MO.readsReg()) in rewriteOperands()
224 Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber()) in rewriteOperands()
346 if (!MO.isDef()) in computeMainRangesFixFlags()
H A DMIRCanonicalizerPass.cpp161 if (!MO.isDef()) in rescheduleCanonically()
177 if (!MO.isDef()) in rescheduleCanonically()
344 if (!MO.isDef() && MO.isKill()) { in doDefKillClear()
349 if (MO.isDef() && MO.isDead()) { in doDefKillClear()
H A DMachineInstrBundle.cpp156 if (MO.isDef()) { in finalizeBundle()
299 if (MO.isDef()) in AnalyzeVirtRegInBundle()
304 if (MO.isDef()) in AnalyzeVirtRegInBundle()
345 } else if (MO.isDef()) { in AnalyzePhysRegInBundle()
H A DLiveRangeEdit.cpp216 if (MO.isDef()) { in foldAsLoad()
317 if (VRM && MI->getOperand(0).isReg() && MI->getOperand(0).isDef() && in eliminateDeadDef()
343 else if (MO.isDef()) in eliminateDeadDef()
353 if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MO.isDef())) || in eliminateDeadDef()
360 if (MO.isDef()) { in eliminateDeadDef()
H A DRegisterScavenging.cpp146 assert(MO.isDef()); in determineKillsAndDefs()
222 assert(MO.isDef()); in forward()
312 if (MO.isDef()) in findSurvivorReg()
650 if (MO.isDef()) { in scavengeVReg()
741 assert((!MO.isUndef() || MO.isDef()) && "Cannot handle undef uses"); in scavengeFrameVirtualRegsInBlock()
745 if (MO.isDef()) { in scavengeFrameVirtualRegsInBlock()
756 assert((!MO.isUndef() || MO.isDef()) && "Cannot handle undef uses"); in scavengeFrameVirtualRegsInBlock()
H A DCriticalAntiDepBreaker.cpp288 if (!MO.isDef()) continue; in ScanInstruction()
367 if (RefOper->isDef() && RefOper->isEarlyClobber()) in isNewRegClobberedByRefs()
376 if (!CheckOper.isReg() || !CheckOper.isDef() || in isNewRegClobberedByRefs()
382 if (RefOper->isDef()) in isNewRegClobberedByRefs()
627 if (MO.isDef() && Reg != AntiDepReg) in BreakAntiDependencies()
H A DLiveRegUnits.cpp48 if (MOP.isDef() && MOP.getReg().isPhysical()) in stepBackward()
75 if (MOP.isDef() || MOP.readsReg()) in accumulate()
H A DImplicitNullChecks.cpp293 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
740 assert(MO.isDef() && "Expected def or use"); in insertFaultingInstr()
782 if (!MO.isReg() || !MO.isDef()) in rewriteNullChecks()
792 if (!MO.isReg() || !MO.getReg() || !MO.isDef() || MO.isDead()) in rewriteNullChecks()
H A DMachineLICM.cpp457 if (!MO.isDef()) { in ProcessMI()
579 if (!MO.isReg() || MO.isDef() || !MO.getReg()) in HoistRegionPostRA()
604 if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue; in AddToLiveIns()
855 if (MO.isDef()) in calcRegisterCost()
1018 if (!MO.isReg() || !MO.isDef()) in HasLoopPHIUse()
1087 if (!DefMO.isReg() || !DefMO.isDef()) in IsCheapInstruction()
1186 if (MO.isDef() && HasHighOperandLatency(MI, i, Reg)) { in IsProfitableToHoist()
1345 if (MO.isReg() && MO.isDef() && !MO.getReg().isPhysical()) in EliminateCSE()
1459 if (MO.isReg() && MO.isDef() && !MO.isDead()) in Hoist()
H A DMachineCSE.cpp295 if (!MO.isReg() || MO.isDef()) in hasLivePhysRegDefUses()
315 if (!MO.isReg() || !MO.isDef()) in hasLivePhysRegDefUses()
392 if (!MO.isReg() || !MO.isDef()) in PhysRegDefsReach()
631 if (!MO.isReg() || !MO.isDef()) in ProcessBlockCSE()
815 if (MO.isDef()) in isPRECandidate()
875 assert(MI.getOperand(0).isDef() && in ProcessBlockPRE()
H A DVirtRegMap.cpp569 if ((MO.readsReg() && (MO.isDef() || MO.isKill())) || in rewrite()
570 (MO.isDef() && subRegLiveThrough(MI, PhysReg))) in rewrite()
573 if (MO.isDef()) { in rewrite()
588 assert(MO.isDef()); in rewrite()
596 if (MO.isDef()) { in rewrite()
H A DLivePhysRegs.cpp52 if (MOP.isDef()) in removeDefs()
90 if (O->isDef()) { in stepForward()
295 if (!MO->isReg() || !MO->isDef() || MO->isDebug()) in recomputeLivenessFlags()
/openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/
H A DMCInstrDescView.cpp44 bool Operand::isDef() const { return IsDef; } in isDef() function in llvm::exegesis::Operand
173 if (Op.isDef()) in create()
177 if (Op.isDef() && Op.isImplicit()) in create()
260 if (Op.isDef()) in dump()
328 if (Op.isReg() && Op.isDef() == SelectDef) { in addOperandIfAlias()
H A DParallelSnippetGenerator.cpp181 if (Op.isDef()) { in generateSingleRegisterForInstrAvoidingDefUseOverlap()
240 if (Op.isDef()) in generateSingleSnippetForInstrAvoidingDefUseOverlap()
266 assert(Op.isDef() && "Not a use and not a def?"); in generateSnippetForInstrAvoidingDefUseOverlap()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DRegBankSelect.cpp153 if (MO.isDef()) in repairReg()
173 if (MO.isDef()) { in repairReg()
245 assert(CurRegBank || MO.isDef()); in getRepairCost()
264 if (MO.isDef()) in getRepairCost()
337 assert((!MI.isPHI() || !MO.isDef()) && "Need split for phi def?"); in tryAvoidingSplit()
340 if (!MO.isDef()) { in tryAvoidingSplit()
364 assert(MI.isTerminator() && MO.isDef() && in tryAvoidingSplit()
770 bool Before = !MO.isDef(); in RepairingPlacement()
/openbsd-src/gnu/llvm/llvm/tools/llvm-reduce/deltas/
H A DReduceRegisterDefs.cpp51 if (!MO.isReg() || !MO.isDef()) in removeDefsFromFunction()
70 if (!MO.isReg() || !MO.isDef()) in removeDefsFromFunction()
H A DReduceInstructionsMIR.cpp37 if (!MO.isReg() || !MO.isDef() || MO.isDead()) in getPrevDefOfRCInMBB()
93 if (!MO.isReg() || !MO.isDef() || MO.isDead()) in extractInstrFromFunction()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DMachineOperand.h381 bool isDef() const { in isDef() function
799 void ChangeToRegister(Register Reg, bool isDef, bool isImp = false,
830 static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp = false,
837 assert(!(isDead && !isDef) && "Dead flag on non-def");
838 assert(!(isKill && isDef) && "Kill flag on def");
840 Op.IsDef = isDef;
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp376 if (!Op.isReg() || !Op.isDef()) in updateDeadsInRange()
503 if (Op.isDef()) { in updateDeadsInRange()
694 assert(MD.isDef()); in split()
751 if (!Op.isReg() || !Op.isDef()) in isPredicable()
788 if (!Op.isReg() || !Op.isDef()) in getReachingDefForPred()
834 if (Op.isDef() && isRefInMap(RR, Uses, Exec_Then)) in canMoveOver()
900 if (!MO.isReg() || !MO.isDef()) in predicateAt()
948 assert(!Op.isDef() && "Not expecting a def"); in renameInRange()
1026 ReferenceMap &Map = Op.isDef() ? Defs : Uses; in predicate()
1027 if (Op.isDef() && Op.isUndef()) { in predicate()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86FixupBWInsts.cpp266 assert((MO.isDef() || MO.isUse()) && "Expected Def or Use only!"); in getSuperRegDestIfDead()
268 if (MO.isDef() && TRI->isSuperRegisterEq(OrigDestReg, MO.getReg())) in getSuperRegDestIfDead()
350 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()

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