Searched refs:is64BitVector (Results 1 – 9 of 9) sorted by relevance
350 bool is64BitVector);1940 unsigned NumVecs, bool is64BitVector) { in GetVLDSTAlign() argument1942 if (!is64BitVector && NumVecs < 3) in GetVLDSTAlign()2127 bool is64BitVector = VT.is64BitVector(); in SelectVLD() local2128 Align = GetVLDSTAlign(Align, dl, NumVecs, is64BitVector); in SelectVLD()2157 if (!is64BitVector) in SelectVLD()2173 if (is64BitVector || NumVecs <= 2) { in SelectVLD()2174 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLD()2242 unsigned Sub0 = (is64BitVector ? ARM::dsub_0 : ARM::qsub_0); in SelectVLD()2272 bool is64BitVector = VT.is64BitVector(); in SelectVST() local[all …]
6507 EVT VT8Bit = VT.is64BitVector() ? MVT::v8i8 : MVT::v16i8; in LowerCTPOP()6513 unsigned NumElts = VT.is64BitVector() ? 8 : 16; in LowerCTPOP()7364 if (VT.is64BitVector() && EltSz == 32) in isVUZPMask()7400 if (VT.is64BitVector() && EltSz == 32) in isVUZP_v_undef_Mask()7438 if (VT.is64BitVector() && EltSz == 32) in isVZIPMask()7471 if (VT.is64BitVector() && EltSz == 32) in isVZIP_v_undef_Mask()8348 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()9592 assert(Op0.getValueType().is64BitVector() && in LowerMUL()9593 Op1.getValueType().is64BitVector() && in LowerMUL()12485 if (!N->getValueType(0).is64BitVector()) in AddCombineToVPADD()[all …]
180 bool is64BitVector() const { in is64BitVector() function181 return isSimple() ? V.is64BitVector() : isExtended64BitVector(); in is64BitVector()
139 else if (LocVT.SimpleTy == MVT::f64 || LocVT.is64BitVector()) in CC_AArch64_Custom_Block()
4646 assert(Op0.getValueType().is64BitVector() && in LowerMUL()4647 Op1.getValueType().is64BitVector() && in LowerMUL()6141 if (OverrideNEON && (VT.is128BitVector() || VT.is64BitVector())) in useSVEForFixedLengthVectorVT()6380 else if (RegVT == MVT::f64 || RegVT.is64BitVector()) in LowerFormalArguments()8676 EVT VT8Bit = VT.is64BitVector() ? MVT::v8i8 : MVT::v16i8; in LowerCTPOP_PARITY()8682 unsigned NumElts = VT.is64BitVector() ? 8 : 16; in LowerCTPOP_PARITY()10403 Src = DAG.getBitcast(SrcVT.is64BitVector() ? MVT::v8i8 : MVT::v16i8, Src); in ReconstructShuffle()10404 assert((SrcVT.is64BitVector() || SrcVT.is128BitVector()) && in ReconstructShuffle()10406 if (SrcVT.is64BitVector()) in ReconstructShuffle()10507 if (!SrcVT.is64BitVector()) { in ReconstructShuffle()[all …]
2949 else if ((VT >= MVT::f16 && VT <= MVT::f64) || VT.is64BitVector() || in fastLowerArguments()2993 } else if ((VT == MVT::f64) || VT.is64BitVector()) { in fastLowerArguments()
174 if (!VT.is64BitVector() || !LVT.is128BitVector() || in SelectExtractHigh()1569 } else if (VT == MVT::f64 || VT.is64BitVector()) { in tryIndexedLoad()
418 bool is64BitVector() const { in is64BitVector() function
26157 assert(StoreVT.is64BitVector() && "Unexpected VT"); in LowerStore()48177 N0.getOperand(0).getValueType().is64BitVector() && in combineVectorPack()48182 N1.getOperand(0).getValueType().is64BitVector() && in combineVectorPack()