| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.h | 274 return DAG.getZeroExtendInReg(Op, dl, OldVT); in ZExtPromotedInteger()
288 return DAG.getZeroExtendInReg(Op, DL, OldVT); in SExtOrZExtPromotedInteger()
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| H A D | LegalizeDAG.cpp | 556 Value = DAG.getZeroExtendInReg(Value, dl, StVT); in LegalizeStoreOps()
937 ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT); in LegalizeLoadOps()
2819 RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType); in ExpandNode()
2823 LHS = DAG.getZeroExtendInReg(Res, dl, AtomicType); in ExpandNode()
2824 RHS = DAG.getZeroExtendInReg(Node->getOperand(2), dl, AtomicType); in ExpandNode()
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| H A D | LegalizeIntegerTypes.cpp | 763 return DAG.getZeroExtendInReg(Res, dl, N->getOperand(0).getValueType()); in PromoteIntRes_INT_EXTEND()
1327 Lo = DAG.getZeroExtendInReg(Lo, DL, OldVT); in PromoteIntRes_FunnelShift()
1438 SDValue Ofl = DAG.getZeroExtendInReg(Res, dl, OVT); in PromoteIntRes_UADDSUBO()
2156 return DAG.getZeroExtendInReg(Op, dl, N->getOperand(0).getValueType()); in PromoteIntOp_ZERO_EXTEND()
4713 Hi = DAG.getZeroExtendInReg(Hi, dl, in ExpandIntRes_ZERO_EXTEND()
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| H A D | DAGCombiner.cpp | 1351 return DAG.getZeroExtendInReg(NewOp, DL, OldVT); in ZExtPromoteOperand()
12785 Op = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT); in visitZERO_EXTEND()
12797 SDValue And = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT); in visitZERO_EXTEND()
12929 return DAG.getZeroExtendInReg(VSetCC, DL, N0.getValueType()); in visitZERO_EXTEND()
12939 return DAG.getZeroExtendInReg(DAG.getAnyExtOrTrunc(VsetCC, DL, VT), DL, in visitZERO_EXTEND()
13553 return DAG.getZeroExtendInReg(N0, SDLoc(N), ExtVT); in visitSIGN_EXTEND_INREG()
25638 Temp = DAG.getZeroExtendInReg(SCC, SDLoc(N2), VT); in SimplifySelectCC()
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| H A D | SelectionDAG.cpp | 1436 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) { in getZeroExtendInReg() function in SelectionDAG
1463 return getZeroExtendInReg(Op, DL, VT); in getPtrExtendInReg()
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| H A D | TargetLowering.cpp | 2203 return TLO.CombineTo(Op, TLO.DAG.getZeroExtendInReg(Op0, dl, ExVT)); in SimplifyDemandedBits()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 980 Victim = DAG.getZeroExtendInReg(Victim, dl, MVT::i8); in LowerShifts()
990 : DAG.getZeroExtendInReg(Victim, dl, MVT::i8); in LowerShifts()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1078 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore()
1311 Ret = DAG.getZeroExtendInReg(Ret, DL, MemEltVT); in lowerPrivateExtLoad()
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| H A D | AMDGPUISelLowering.cpp | 4220 return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT); in PerformDAGCombine()
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| H A D | SIISelLowering.cpp | 8665 Cvt = DAG.getZeroExtendInReg(NewLoad, SL, TruncVT); in widenLoad()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 2566 Vs[i] = DAG.getZeroExtendInReg(Vs[i], dl, MVT::i8); in buildVector32()
2674 ExtV = DAG.getZeroExtendInReg(VecV, dl, tyScalar(ValTy)); in extractVector()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 949 SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT);
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1987 FpToInt = DAG.getZeroExtendInReg(FpToInt, DL, MVT::i32); in lowerFP_TO_INT_SAT()
9701 FpToInt = DAG.getZeroExtendInReg(FpToInt, DL, MVT::i32); in performFP_TO_INT_SATCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 26127 StoredVal = DAG.getZeroExtendInReg( in LowerStore()
48728 return DAG.getZeroExtendInReg(Op, DL, NarrowVT); in PromoteMaskArithmetic()
50698 Val = DAG.getZeroExtendInReg(Val, dl, MVT::i1); in combineStore()
52999 Res = DAG.getZeroExtendInReg(Res, dl, N0.getValueType()); in combineExtSetcc()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18569 : DAG.getZeroExtendInReg(VVT, DL, ExtVT); in PerformMVEExtCombine()
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