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Searched refs:getVectorMinNumElements (Results 1 – 17 of 17) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Support/
H A DLowLevelType.cpp20 bool asVector = VT.getVectorMinNumElements() > 1; in LLT()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DValueTypes.h331 unsigned getVectorMinNumElements() const { in getVectorMinNumElements() function
438 unsigned NElts = getVectorMinNumElements(); in isPow2VectorType()
/openbsd-src/gnu/llvm/llvm/include/llvm/Support/
H A DMachineValueType.h521 unsigned NElts = getVectorMinNumElements(); in isPow2VectorType()
723 unsigned getVectorMinNumElements() const { in getVectorMinNumElements() function
902 return ElementCount::get(getVectorMinNumElements(), isScalableVector()); in getVectorElementCount()
911 return getVectorMinNumElements(); in getVectorNumElements()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1391 DAG.getVectorIdxConstant(IdxVal + LoVT.getVectorMinNumElements(), dl)); in SplitVecRes_EXTRACT_SUBVECTOR()
1405 unsigned VecElems = VecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1406 unsigned SubElems = SubVecVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1407 unsigned LoElems = LoVT.getVectorMinNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
1717 unsigned LoNumElts = Lo.getValueType().getVectorMinNumElements(); in SplitVecRes_INSERT_VECTOR_ELT()
1803 DAG.getVScale(dl, EltVT, StepVal * LoVT.getVectorMinNumElements()); in SplitVecRes_STEP_VECTOR()
2768 DAG.getVectorIdxConstant(LoVT.getVectorMinNumElements(), DL)); in SplitVecRes_VECTOR_SPLICE()
3103 uint64_t LoElts = Lo.getValueType().getVectorMinNumElements(); in SplitVecOp_INSERT_SUBVECTOR()
3123 uint64_t LoEltsMin = Lo.getValueType().getVectorMinNumElements(); in SplitVecOp_EXTRACT_SUBVECTOR()
3127 assert(IdxVal + SubVT.getVectorMinNumElements() <= LoEltsMin && in SplitVecOp_EXTRACT_SUBVECTOR()
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H A DSelectionDAG.cpp5085 unsigned IdentityIndex = i * Op.getValueType().getVectorMinNumElements(); in foldCONCAT_VECTORS()
5518 assert(VT.getVectorMinNumElements() < in getNode()
5519 Operand.getValueType().getVectorMinNumElements() && in getNode()
6491 VT.getVectorMinNumElements() <= N1VT.getVectorMinNumElements()) && in getNode()
6495 (VT.getVectorMinNumElements() + N2C->getZExtValue()) <= in getNode()
6496 N1VT.getVectorMinNumElements()) && in getNode()
6514 unsigned Factor = VT.getVectorMinNumElements(); in getNode()
6719 VT.getVectorMinNumElements() >= N2VT.getVectorMinNumElements()) && in getNode()
6724 (N2VT.getVectorMinNumElements() + in getNode()
6726 VT.getVectorMinNumElements()) && in getNode()
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H A DDAGCombiner.cpp13530 unsigned DstElts = N0.getValueType().getVectorMinNumElements(); in visitSIGN_EXTEND_INREG()
13531 unsigned SrcElts = N00.getValueType().getVectorMinNumElements(); in visitSIGN_EXTEND_INREG()
15811 NumElts = VT.getVectorMinNumElements(); in combineRepeatedFPDivisors()
22406 N->getOperand(0).getValueType().getVectorMinNumElements(); in visitCONCAT_VECTORS()
22454 (IndexC->getZExtValue() % SubVT.getVectorMinNumElements()) == 0) { in getSubVectorSrc()
22455 uint64_t SubIdx = IndexC->getZExtValue() / SubVT.getVectorMinNumElements(); in getSubVectorSrc()
22646 unsigned NumElts = VT.getVectorMinNumElements(); in narrowExtractedVectorLoad()
22870 unsigned SrcNumElts = SrcVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR()
22871 unsigned DestNumElts = V.getValueType().getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR()
22917 unsigned ExtNumElts = NVT.getVectorMinNumElements(); in visitEXTRACT_SUBVECTOR()
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H A DLegalizeIntegerTypes.cpp5317 unsigned NElts = NInVT.getVectorMinNumElements(); in PromoteIntRes_EXTRACT_SUBVECTOR()
5494 unsigned NumOutElem = NOutVT.getVectorMinNumElements(); in PromoteIntRes_CONCAT_VECTORS()
5675 unsigned OpNumElts = Op.getValueType().getVectorMinNumElements(); in PromoteIntOp_CONCAT_VECTORS()
H A DSelectionDAGBuilder.cpp775 unsigned IntermediateNumElts = IntermediateVT.getVectorMinNumElements(); in getCopyToPartsVector()
11550 unsigned NumElts = VT.getVectorMinNumElements(); in visitVectorReverse()
H A DTargetLowering.cpp9357 unsigned NElts = VecVT.getVectorMinNumElements(); in clampDynamicVectorIndex()
10362 if (TrailingElts > VT.getVectorMinNumElements()) { in expandVectorSplice()
/openbsd-src/gnu/llvm/llvm/utils/TableGen/
H A DIntrinsicEmitter.cpp403 switch (VVT.getVectorMinNumElements()) { in EncodeFixedType()
H A DCodeGenDAGPatterns.cpp674 return B.getVectorMinNumElements() < P.getVectorMinNumElements(); in EnforceVectorSubVectorTypeIs()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp138 if (VT.getVectorMinNumElements() < MinElts) in RISCVTargetLowering()
4069 Op.getOperand(0).getSimpleValueType().getVectorMinNumElements(); in LowerOperation()
6179 if (VecVT.getVectorMinNumElements() >= 8 && in lowerINSERT_SUBVECTOR()
6180 SubVecVT.getVectorMinNumElements() >= 8) { in lowerINSERT_SUBVECTOR()
6182 assert(VecVT.getVectorMinNumElements() % 8 == 0 && in lowerINSERT_SUBVECTOR()
6183 SubVecVT.getVectorMinNumElements() % 8 == 0 && in lowerINSERT_SUBVECTOR()
6187 MVT::getVectorVT(MVT::i8, SubVecVT.getVectorMinNumElements() / 8, in lowerINSERT_SUBVECTOR()
6189 VecVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorMinNumElements() / 8, in lowerINSERT_SUBVECTOR()
6297 VL = DAG.getConstant(SubVecVT.getVectorMinNumElements(), DL, XLenVT); in lowerINSERT_SUBVECTOR()
6336 if (VecVT.getVectorMinNumElements() >= 8 && in lowerEXTRACT_SUBVECTOR()
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/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp1772 DstTyL.first * DstTyL.second.getVectorMinNumElements(); in isWideningInstruction()
1774 SrcTyL.first * SrcTyL.second.getVectorMinNumElements(); in isWideningInstruction()
H A DAArch64ISelLowering.cpp186 switch (VT.getVectorMinNumElements()) { in getPromotedVTForPredicate()
4703 unsigned ElementSize = 128 / Op.getValueType().getVectorMinNumElements(); in optimizeWhile()
5312 return DataVT.isFixedLengthVector() || DataVT.getVectorMinNumElements() > 2; in shouldRemoveExtendFromGSIndex()
12714 unsigned NumElts = VT.getVectorMinNumElements(); in LowerINSERT_SUBVECTOR()
12761 assert(Idx == InVT.getVectorMinNumElements() && in LowerINSERT_SUBVECTOR()
15034 return (Index == 0 || Index == ResVT.getVectorMinNumElements()); in isExtractSubvectorCheap()
16246 unsigned NumElts = N.getValueType().getVectorMinNumElements(); in isAllActivePredicate()
16253 if (N.getValueType().getVectorMinNumElements() < NumElts) in isAllActivePredicate()
16265 return N.getValueType().getVectorMinNumElements() >= NumElts; in isAllActivePredicate()
17489 Elt0->getConstantOperandVal(1) % VT.getVectorMinNumElements() == 0) { in performBuildVectorCombine()
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H A DAArch64ISelDAGToDAG.cpp1715 switch (VT.getVectorMinNumElements()) { in SelectOpcodeFromVT()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2180 unsigned VecLen = VT.getVectorMinNumElements(); in getPreferredVectorAction()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp16962 128 / AVT.getVectorMinNumElements())), in PerformVECREDUCE_ADDCombine()