| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 537 inline unsigned getUndefRegState(bool B) { in getUndefRegState() function
555 getUndefRegState(RegOp.isUndef()) | in getRegState()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | MachineInstrBundle.cpp | 228 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | in finalizeBundle()
|
| H A D | SplitKit.cpp | 523 .addReg(ToReg, RegState::Define | getUndefRegState(FirstCopy) in buildSingleSubRegCopy()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1743 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1751 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef)) in InsertLDR_STR()
1752 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1822 getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) in FixInvalidRegPairOp()
1824 getKillRegState(OddDeadKill) | getUndefRegState(OddUndef)) in FixInvalidRegPairOp()
|
| H A D | ARMExpandPseudoInsts.cpp | 738 MIB.addReg(D0, getUndefRegState(SrcIsUndef)); in ExpandVST()
740 MIB.addReg(D1, getUndefRegState(SrcIsUndef)); in ExpandVST()
742 MIB.addReg(D2, getUndefRegState(SrcIsUndef)); in ExpandVST()
744 MIB.addReg(D3, getUndefRegState(SrcIsUndef)); in ExpandVST()
822 unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | in ExpandLaneOp()
|
| H A D | ARMBaseInstrInfo.cpp | 5216 .addReg(DReg, getUndefRegState(!MI.readsRegister(DReg, TRI))) in setExecutionDomain()
5252 .addReg(DDst, getUndefRegState(!MI.readsRegister(DDst, TRI))) in setExecutionDomain()
5286 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5290 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
5304 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5308 MIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 679 unsigned Flags1 = getUndefRegState(Cond[1].isUndef()); in insertBranch()
683 unsigned Flags2 = getUndefRegState(Cond[2].isUndef()); in insertBranch()
694 unsigned Flags = getUndefRegState(RO.isUndef()); in insertBranch()
718 unsigned Flags = getUndefRegState(RO.isUndef()); in insertBranch()
924 unsigned UndefLo = getUndefRegState(!LiveAtMI.contains(SrcLo)); in copyPhysReg()
925 unsigned UndefHi = getUndefRegState(!LiveAtMI.contains(SrcHi)); in copyPhysReg()
1142 unsigned UndefLo = getUndefRegState(!LiveIn.contains(SrcLo)); in expandPostRAPseudo()
1143 unsigned UndefHi = getUndefRegState(!LiveIn.contains(SrcHi)); in expandPostRAPseudo()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 205 .addReg(CCReg, getUndefRegState(CC->isUndef()), CC->getSubReg()); in optimizeVcndVcmpPair()
|
| H A D | AMDGPUInstructionSelector.cpp | 603 MIB.addReg(Src.getReg(), getUndefRegState(Src.isUndef())); in selectG_MERGE_VALUES()
|
| H A D | SIInstrInfo.cpp | 5613 unsigned VRsrcUndef = getUndefRegState(Rsrc.isUndef()); in emitLoadSRsrcFromVGPRLoop()
|
| H A D | SIISelLowering.cpp | 3651 .addReg(Idx.getReg(), getUndefRegState(Idx.isUndef())); in emitLoadM0FromVGPRLoop()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 83 unsigned Reg128Undef = getUndefRegState(LowRegOp.isUndef()); in splitMove()
268 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)); in emitGRX32Move()
273 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)) in emitGRX32Move()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 653 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in moveAndTeeForMultiUse()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 1031 getKillRegState(DstIsKill) | getUndefRegState(DstIsUndef)) in expand()
1040 .addReg(DstReg, getUndefRegState(DstIsUndef)) in expand()
1045 .addReg(DstReg, getUndefRegState(DstIsUndef)) in expand()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 316 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
|
| H A D | X86InstrInfo.cpp | 4916 getUndefRegState(MIB->getOperand(1).isUndef())); in expandSHXDROT()
6988 getUndefRegState(ImpOp.isUndef())); in unfoldMemoryOperand()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3972 .addReg(DestReg0, RegState::Define | getUndefRegState(IsUndef), SubIdx0) in loadRegPairFromStackSlot()
3973 .addReg(DestReg1, RegState::Define | getUndefRegState(IsUndef), SubIdx1) in loadRegPairFromStackSlot()
|