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Searched refs:getNumDefs (Results 1 – 25 of 70) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp98 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i) in init()
135 for (unsigned i = 0; i < MCID.getNumDefs(); ++i) { in init()
192 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i) in init()
534 unsigned Defs = HexagonMCInstrInfo::getDesc(MCII, Inst).getNumDefs(); in checkRegistersReadOnly()
551 for (unsigned j = HexagonMCInstrInfo::getDesc(MCII, I).getNumDefs(), in registerUsed()
571 for (unsigned J = 0, N = Desc.getNumDefs(); J < N; ++J) in registerProducer()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DExecutionDomainFix.cpp239 e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); in processDefs()
259 for (unsigned i = mi->getDesc().getNumDefs(), in visitHardInstr()
271 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitHardInstr()
290 for (unsigned i = mi->getDesc().getNumDefs(), in visitSoftInstr()
H A DBreakFalseDeps.cpp196 for (unsigned i = MCID.getNumDefs(), e = MCID.getNumOperands(); i != e; ++i) { in processDefs()
218 e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); in processDefs()
H A DPeepholeOptimizer.cpp889 NumDefs = MI.getDesc().getNumDefs(); in UncoalescableRewriter()
1189 assert(MI.getDesc().getNumDefs() == 1 && in optimizeCoalescableCopy()
1335 if (MCID.getNumDefs() != 1) in isLoadFoldable()
1356 if (MCID.getNumDefs() != 1) in isMoveImmediate()
1529 if (MI.getDesc().getNumDefs() != 1) in findTargetRecurrence()
1769 for (unsigned i = MIDesc.getNumDefs(); i != MI->getNumOperands(); in runOnMachineFunction()
1850 if (Def->getDesc().getNumDefs() != 1) in getNextSourceFromBitcast()
2066 (DefIdx < Def->getDesc().getNumDefs() || in getNextSourceImpl()
H A DDetectDeadLanes.cpp275 if (MI.getDesc().getNumDefs() != 1) in transferDefinedLanesStep()
423 assert(UseMI.getDesc().getNumDefs() == 1); in determineInitialUsedLanes()
H A DImplicitNullChecks.cpp369 if (MI.getDesc().getNumDefs() > 1) in isSuitableMemoryOp()
713 unsigned NumDefs = MI->getDesc().getNumDefs(); in insertFaultingInstr()
H A DMachineCSE.cpp627 unsigned NumDefs = MI.getNumDefs(); in ProcessBlockCSE()
809 MI->getNumDefs() != 1 || in isPRECandidate()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1932 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_r()
1934 if (II.getNumDefs() >= 1) in fastEmitInst_r()
1954 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rr()
1955 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1); in fastEmitInst_rr()
1957 if (II.getNumDefs() >= 1) in fastEmitInst_rr()
1978 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rrr()
1979 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1); in fastEmitInst_rrr()
1980 Op2 = constrainOperandRegClass(II, Op2, II.getNumDefs() + 2); in fastEmitInst_rrr()
1982 if (II.getNumDefs() >= 1) in fastEmitInst_rrr()
2005 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_ri()
[all …]
H A DScheduleDAGSDNodes.cpp131 if (ResNo >= II.getNumDefs() && II.hasImplicitDefOfPhysReg(Reg)) in CheckForPhysRegDependency()
472 if (NumUsed > TII->get(N->getMachineOpcode()).getNumDefs()) in AddSchedEdges()
574 unsigned NRegDefs = SchedDAG->TII->get(Node->getMachineOpcode()).getNumDefs(); in InitNodeNumDefs()
661 OpIdx += TII->get(Use->getMachineOpcode()).getNumDefs(); in computeOperandLatency()
H A DScheduleDAGRRList.cpp1289 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
1435 for (unsigned i = 0; i < MCID.getNumDefs(); ++i) in DelayForLiveRegsBottomUp()
2131 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure()
2177 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff()
2316 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode()
2333 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode()
2847 unsigned NumRes = MCID.getNumDefs(); in canClobber()
2904 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs()
3087 unsigned NumRes = MCID.getNumDefs(); in AddPseudoTwoAddrDeps()
H A DInstrEmitter.cpp132 if (i + II.getNumDefs() < II.getNumOperands()) { in EmitCopyFromReg()
134 TII->getRegClass(II, i + II.getNumDefs(), TRI, *MF)); in EmitCopyFromReg()
197 unsigned NumVRegs = HasVRegVariadicDefs ? NumResults : II.getNumDefs(); in CreateVirtualRegisters()
1001 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DGenericMachineInstrs.h144 unsigned getNumDefs() const { return getNumOperands() - 1; } in getNumDefs() function
146 Register getSourceReg() const { return getOperand(getNumDefs()).getReg(); } in getSourceReg()
H A DLegalizationArtifactCombiner.h788 unsigned NumDefs = MI.getNumDefs(); in tryCombineUnmergeDefs()
920 unsigned NumElts = Unmerge->getNumDefs(); in tryCombineMergeLike()
926 if ((!UnmergeI) || (UnmergeI->getNumDefs() != NumElts) || in tryCombineMergeLike()
948 unsigned NumDefs = MI.getNumDefs(); in tryCombineUnmergeValues()
/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVMCCodeEmitter.cpp66 if (MCDesc.getNumDefs() == 1 && MCDesc.getNumOperands() >= 2) { in hasType()
/openbsd-src/gnu/llvm/llvm/lib/MCA/
H A DInstrBuilder.cpp239 unsigned NumExplicitDefs = MCDesc.getNumDefs(); in verifyOperands()
314 unsigned NumExplicitDefs = MCDesc.getNumDefs(); in populateWrites()
437 unsigned NumExplicitUses = MCDesc.getNumOperands() - MCDesc.getNumDefs(); in populateReads()
446 for (unsigned I = 0, OpIndex = MCDesc.getNumDefs(); I < NumExplicitUses; in populateReads()
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmTypeCheck.cpp333 for (unsigned I = II.getNumOperands(); I > II.getNumDefs(); I--) { in typeCheck()
342 for (unsigned I = 0; I < II.getNumDefs(); I++) { in typeCheck()
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyInstPrinter.cpp300 else if (OpNo >= Desc.getNumDefs() && !IsVariadicDef) in printOperand()
307 if (OpNo < MII.get(MI->getOpcode()).getNumDefs() || IsVariadicDef) in printOperand()
/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVDuplicatesTracker.cpp53 for (auto i = MI->getNumDefs(); i < MI->getNumOperands(); i++) { in buildDepsGraph()
H A DSPIRVInstrInfo.cpp51 if (MI.getNumDefs() >= 1 && MI.getOperand(0).isReg()) { in isTypeDeclInstr()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp142 for (int I = 0, E = Desc.getNumDefs(); I != E; ++I) { in processMachineBasicBlock()
H A DAArch64FastISel.cpp1142 constrainOperandRegClass(II, Addr.getReg(), II.getNumDefs()+Idx)); in addLoadStoreOperands()
1144 constrainOperandRegClass(II, Addr.getOffsetReg(), II.getNumDefs()+Idx+1)); in addLoadStoreOperands()
1333 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_rr()
1334 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1); in emitAddSub_rr()
1378 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_ri()
1419 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_rs()
1420 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1); in emitAddSub_rs()
1463 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_rx()
1464 RHSReg = constrainOperandRegClass(II, RHSReg, II.getNumDefs() + 1); in emitAddSub_rx()
2142 SrcReg = constrainOperandRegClass(II, SrcReg, II.getNumDefs()); in emitStore()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DLocalizer.cpp90 assert(MI.getDesc().getNumDefs() == 1 && in localizeInterBlock()
/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCInstrDesc.h252 unsigned getNumDefs() const { return NumDefs; } in getNumDefs() function
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DStackMaps.h174 NumDefs = MI->getNumDefs(); in StatepointOpers()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h182 return Desc.getNumDefs(); in getMergeOpNum()

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