Searched refs:getMemScale (Results 1 – 5 of 5) sorted by relevance
45 int StoreSize0 = AArch64InstrInfo::getMemScale(MI0); in mayOverlapWrite()46 int StoreSize1 = AArch64InstrInfo::getMemScale(MI1); in mayOverlapWrite()56 int StoreSize = AArch64InstrInfo::getMemScale(MI) * Multiples; in mayOverlapWrite()
599 Scale = (IsTagStore || IsPaired) ? AArch64InstrInfo::getMemScale(MI) : 1; in getPrePostIndexedMemOpInfo()625 int LoadSize = TII->getMemScale(LoadInst); in isLdOffsetInRangeOfSt()626 int StoreSize = TII->getMemScale(StoreInst); in isLdOffsetInRangeOfSt()738 int OffsetStride = IsScaled ? 1 : TII->getMemScale(*I); in mergeNarrowZeroStores()845 int OffsetStride = IsUnscaled ? TII->getMemScale(*I) : 1; in mergePairedInsns()932 int MemSize = TII->getMemScale(*Paired); in mergePairedInsns()936 assert(!(PairedOffset % TII->getMemScale(*Paired)) && in mergePairedInsns()964 assert(!(OffsetImm % TII->getMemScale(*RtMI)) && in mergePairedInsns()966 OffsetImm /= TII->getMemScale(*RtMI); in mergePairedInsns()1073 int LoadSize = TII->getMemScale(*LoadI); in promoteLoadFromStore()[all …]
90 static int getMemScale(unsigned Opc);91 static int getMemScale(const MachineInstr &MI) { in getMemScale() function92 return getMemScale(MI.getOpcode()); in getMemScale()
3094 int AArch64InstrInfo::getMemScale(unsigned Opc) { in getMemScale() function in AArch64InstrInfo3279 int Scale = AArch64InstrInfo::getMemScale(Opc); in scaleOffset()3320 int Scale1 = AArch64InstrInfo::getMemScale(Opcode1); in shouldClusterFI()3324 int Scale2 = AArch64InstrInfo::getMemScale(Opcode2); in shouldClusterFI()
205 unsigned getMemScale() const { in getMemScale() function386 !getMemIndexReg() && getMemScale() == 1 && isMaybeDirectBranchDest(); in isAbsMem()400 return !getMemIndexReg() && getMemScale() == 1 && in isSrcIdx()419 return !getMemIndexReg() && getMemScale() == 1 && in isDstIdx()440 getMemScale() == 1; in isMemOffs()597 Inst.addOperand(MCOperand::createImm(getMemScale())); in addMemOperands()