| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 48 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
64 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
77 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
90 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
103 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
112 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
127 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
156 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding()
160 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
174 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding()
[all …]
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| H A D | PPCMCCodeEmitter.h | 105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCCodeEmitter.cpp | 62 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
207 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
227 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
229 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding()
238 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
240 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr20Encoding()
250 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDLAddr12Len4Encoding()
252 uint64_t Len = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI) - 1; in getBDLAddr12Len4Encoding()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 537 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
732 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
757 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
759 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
773 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
775 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
787 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
789 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
801 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
803 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
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| H A D | MipsMCCodeEmitter.h | 180 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEMCCodeEmitter.cpp | 63 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
89 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in VEMCCodeEmitter
121 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
134 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
144 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCCodeEmitter.cpp | 68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
112 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
121 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
210 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
223 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
236 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
109 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
78 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | R600MCCodeEmitter.cpp | 47 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
156 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
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| H A D | SIMCCodeEmitter.cpp | 54 void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
362 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
424 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
540 void SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
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| H A D | AMDGPUMCCodeEmitter.h | 40 virtual void getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 47 void getMachineOpValue(const MCInst &MI, const MCOperand &Op,
175 void M68kMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &Op, in getMachineOpValue() function in M68kMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaMCCodeEmitter.cpp | 58 uint32_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
145 XtensaMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in XtensaMCCodeEmitter
267 uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getMemRegEncoding()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
82 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in LoongArchMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.h | 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| H A D | HexagonMCCodeEmitter.cpp | 707 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRMCCodeEmitter.h | 94 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | AVRMCCodeEmitter.cpp | 254 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 72 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
226 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.h | 45 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | CSKYMCCodeEmitter.cpp | 245 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in CSKYMCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 61 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
217 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 86 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
552 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter
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