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Searched refs:current_state (Results 1 – 25 of 90) sorted by relevance

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/openbsd-src/sys/dev/pci/drm/amd/display/modules/hdcp/
H A Dhdcp.h408 static inline uint8_t current_state(struct mod_hdcp *hdcp) in current_state() function
426 return (current_state(hdcp) > HDCP1_STATE_START && in is_in_hdcp1_states()
427 current_state(hdcp) <= HDCP1_STATE_END); in is_in_hdcp1_states()
432 return (current_state(hdcp) > HDCP1_DP_STATE_START && in is_in_hdcp1_dp_states()
433 current_state(hdcp) <= HDCP1_DP_STATE_END); in is_in_hdcp1_dp_states()
438 return (current_state(hdcp) > HDCP2_STATE_START && in is_in_hdcp2_states()
439 current_state(hdcp) <= HDCP2_STATE_END); in is_in_hdcp2_states()
444 return (current_state(hdcp) > HDCP2_DP_STATE_START && in is_in_hdcp2_dp_states()
445 current_state(hdcp) <= HDCP2_DP_STATE_END); in is_in_hdcp2_dp_states()
450 return (current_state(hdcp) == D1_A4_AUTHENTICATED || in is_in_authenticated_states()
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H A Dhdcp.c245 if (current_state(hdcp) != HDCP_UNINITIALIZED) { in reset_connection()
368 if (current_state(hdcp) != HDCP_INITIALIZED) in mod_hdcp_add_display()
412 if (current_state(hdcp) != HDCP_UNINITIALIZED) in mod_hdcp_remove_display()
474 if (current_state(hdcp) != HDCP_UNINITIALIZED) in mod_hdcp_update_display()
H A Dhdcp1_transition.c37 switch (current_state(hdcp)) { in mod_hdcp_hdcp1_transition()
160 switch (current_state(hdcp)) { in mod_hdcp_hdcp1_dp_transition()
/openbsd-src/sys/dev/pci/drm/amd/display/dc/core/
H A Damdgpu_dc.c118 * these structs in dc->current_state representing the currently programmed state.
417 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
452 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_last_used_drr_vtotal()
483 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crtc_position()
543 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_crc_window()
594 &dc->current_state->res_ctx, stream); in dc_stream_configure_crc()
660 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
684 if (dc->current_state->res_ctx.pipe_ctx[i].stream in dc_stream_set_dyn_expansion()
686 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dyn_expansion()
706 if (link->dc->current_state in dc_stream_set_dither_option()
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H A Ddc_link_enc_cfg.c71 if (dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_TRANSIENT) in get_assignment()
72 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i]; in get_assignment()
74 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_assignment()
307 ASSERT(dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_STEADY); in link_enc_cfg_link_encs_assign()
310 for (i = 0; i < dc->current_state->stream_count; i++) in link_enc_cfg_link_encs_assign()
311 dc->res_pool->funcs->link_enc_unassign(state, dc->current_state->streams[i]); in link_enc_cfg_link_encs_assign()
336 if (state != dc->current_state) { in link_enc_cfg_link_encs_assign()
337 struct dc_state *prev_state = dc->current_state; in link_enc_cfg_link_encs_assign()
410 dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i] = in link_enc_cfg_link_encs_assign()
417 dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in link_enc_cfg_link_encs_assign()
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H A Ddc_stream.c247 return dc_stream_get_status_from_state(dc->current_state, stream); in dc_stream_get_status()
262 res_ctx = &dc->current_state->res_ctx; in program_cursor_attributes()
327 (dc->current_state->stream_count > 1 || in is_subvp_high_refresh_candidate()
328 (dc->current_state->stream_count == 1 && !stream->allow_freesync))) in is_subvp_high_refresh_candidate()
369 if (dc->current_state->stream_count == 1 && stream->timing.v_addressable >= 2880 && in dc_stream_set_cursor_attributes()
372 else if (dc->current_state->stream_count > 1 && stream->timing.v_addressable >= 2160 && in dc_stream_set_cursor_attributes()
407 res_ctx = &dc->current_state->res_ctx; in program_cursor_position()
580 &dc->current_state->res_ctx; in dc_stream_get_vblank_counter()
608 res_ctx = &dc->current_state->res_ctx; in dc_stream_send_dp_sdp()
639 &dc->current_state->res_ctx; in dc_stream_get_scanoutpos()
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H A Ddc_surface.c146 if (dc->current_state == NULL) in dc_plane_get_status()
152 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
165 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
/openbsd-src/usr.sbin/sasyncd/
H A Dcarp.c163 carp_update_state(enum RUNSTATE current_state) in carp_update_state() argument
166 if ((unsigned)current_state > FAIL) { in carp_update_state()
172 if (current_state != cfgstate.runstate) { in carp_update_state()
174 carp_state_name(current_state)); in carp_update_state()
175 cfgstate.runstate = current_state; in carp_update_state()
176 if (current_state == MASTER) in carp_update_state()
/openbsd-src/usr.bin/talk/
H A Dmsgs.c42 char *current_state; variable
48 message(current_state); in disp_msg()
56 message(current_state); in start_msgs()
H A Dlook_up.c64 current_state = "Waiting to connect with caller"; in check_local()
96 current_state = "Checking for invitation on caller's machine"; in look_for_invite()
H A Dtalk.h49 extern char *current_state;
/openbsd-src/gnu/llvm/lldb/third_party/Python/module/pexpect-4.6/pexpect/
H A DFSM.py117 self.current_state = self.initial_state
128 self.current_state = self.initial_state
239 (self.action, self.next_state) = self.get_transition (self.input_symbol, self.current_state)
242 self.current_state = self.next_state
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c199 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn32_check_no_memory_request_for_cab()
200 if ((dc->current_state->stream_status[i].plane_count) && in dcn32_check_no_memory_request_for_cab()
201 (dc->current_state->streams[i]->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED)) in dcn32_check_no_memory_request_for_cab()
206 if (i == dc->current_state->stream_count) in dcn32_check_no_memory_request_for_cab()
259 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn32_apply_idle_power_optimizations()
261 if (dc->current_state->streams[i] != NULL && in dcn32_apply_idle_power_optimizations()
262 dc->current_state->streams[i]->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) in dcn32_apply_idle_power_optimizations()
267 if (dc->current_state) { in dcn32_apply_idle_power_optimizations()
288 ways = dcn32_calculate_cab_allocation(dc, dc->current_state); in dcn32_apply_idle_power_optimizations()
293 for (i = 0; i < dc->current_state in dcn32_apply_idle_power_optimizations()
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/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.c528 hws->funcs.init_pipes(dc, dc->current_state); in dcn30_init_hw()
714 if (dc->current_state) { in dcn30_apply_idle_power_optimizations()
718 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn30_apply_idle_power_optimizations()
719 if (dc->current_state->stream_status[i].plane_count) in dcn30_apply_idle_power_optimizations()
724 if (i == dc->current_state->stream_count) { in dcn30_apply_idle_power_optimizations()
736 stream = dc->current_state->streams[0]; in dcn30_apply_idle_power_optimizations()
737 plane = (stream ? dc->current_state->stream_status[0].plane_states[0] : NULL); in dcn30_apply_idle_power_optimizations()
757 if (dc->current_state->stream_count == 1 && in dcn30_apply_idle_power_optimizations()
759 dc->current_state->stream_status[0].plane_count == 1 && in dcn30_apply_idle_power_optimizations()
794 unsigned int stutter_period = dc->current_state in dcn30_apply_idle_power_optimizations()
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/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c433 …pix_clk = dc->current_state->res_ctx.pipe_ctx[i].stream_res.pix_clk_params.requested_pix_clk_100hz… in dcn10_get_otg_states()
476 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_get_clock_states()
477 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_get_clock_states()
478 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz, in dcn10_get_clock_states()
479 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
480 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_get_clock_states()
481 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_get_clock_states()
H A Ddcn10_hw_sequencer.c103 old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
464 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()
465 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz, in dcn10_log_hw_state()
466 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz, in dcn10_log_hw_state()
467 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
468 dc->current_state->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz, in dcn10_log_hw_state()
469 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_log_hw_state()
470 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_log_hw_state()
860 struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in false_optc_underflow_wa()
1036 update_audio_usage(&dc->current_state in dcn10_reset_back_end_for_pipe()
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/openbsd-src/sys/dev/pci/drm/radeon/
H A Drs780_dpm.c380 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage() local
382 if ((current_state->max_voltage == RS780_VDDC_LEVEL_HIGH) && in rs780_force_voltage()
383 (current_state->min_voltage == RS780_VDDC_LEVEL_HIGH)) in rs780_force_voltage()
407 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv() local
409 if (current_state->sclk_low == current_state->sclk_high) in rs780_force_fbdiv()
568 struct igp_ps *current_state = rs780_get_ps(old_ps); in rs780_set_uvd_clock_before_set_eng_clock() local
574 if (new_state->sclk_high >= current_state->sclk_high) in rs780_set_uvd_clock_before_set_eng_clock()
585 struct igp_ps *current_state = rs780_get_ps(old_ps); in rs780_set_uvd_clock_after_set_eng_clock() local
591 if (new_state->sclk_high < current_state->sclk_high) in rs780_set_uvd_clock_after_set_eng_clock()
/openbsd-src/sys/dev/pci/drm/amd/display/dc/link/protocols/
H A Dlink_edp_panel_control.c501 if (dc->current_state->res_ctx.pipe_ctx[i].stream) { in get_pipe_from_link()
502 if (dc->current_state->res_ctx.pipe_ctx[i].stream->link == link) { in get_pipe_from_link()
503 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in get_pipe_from_link()
736 if (dc->current_state->res_ctx.pipe_ctx[i].stream in edp_setup_psr()
742 dc->current_state->res_ctx. in edp_setup_psr()
956 if (dc->current_state->res_ctx.pipe_ctx[i].stream in edp_setup_replay()
962 dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg->inst + 1; in edp_setup_replay()
1042 struct pipe_ctx pipe_ctx = dc->current_state->res_ctx.pipe_ctx[i]; in get_abm_from_stream_res()
/openbsd-src/gnu/llvm/lldb/source/Plugins/Process/Windows/Common/
H A DTargetThreadWindows.cpp129 StateType current_state = GetState(); in DoResume() local
130 if (resume_state == current_state) in DoResume()
H A DNativeThreadWindows.cpp47 StateType current_state = GetState(); in DoResume() local
48 if (resume_state == current_state) in DoResume()
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c1581 (context == dc->current_state && plane_state->update_flags.bits.position_change) || in dcn20_update_dchubp_dpp()
1582 (context == dc->current_state && plane_state->update_flags.bits.scaling_change) || in dcn20_update_dchubp_dpp()
1583 (context == dc->current_state && pipe_ctx->stream->update_flags.bits.scaling)) { in dcn20_update_dchubp_dpp()
1812 struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn20_program_front_end_for_ctx()
1832 if (dc->current_state->res_ctx.pipe_ctx[i].plane_state) in dcn20_program_front_end_for_ctx()
1847 dcn20_detect_pipe_changes(&dc->current_state->res_ctx.pipe_ctx[i], in dcn20_program_front_end_for_ctx()
1854 struct dc_stream_state *stream = dc->current_state->res_ctx.pipe_ctx[i].stream; in dcn20_program_front_end_for_ctx()
1857 dc->current_state->res_ctx.pipe_ctx[i].stream->mall_stream_config.type == SUBVP_PHANTOM) { in dcn20_program_front_end_for_ctx()
1858 struct timing_generator *tg = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg; in dcn20_program_front_end_for_ctx()
1864 main_pipe_width = dc->current_state in dcn20_program_front_end_for_ctx()
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/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn31/
H A Ddcn31_hwseq.c211 hws->funcs.init_pipes(dc, dc->current_state); in dcn31_init_hw()
554 update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, in dcn31_reset_back_end_for_pipe()
575 &dc->current_state->res_ctx.pipe_ctx[i]; in dcn31_reset_hw_ctx_wrap()
588 dcn31_reset_back_end_for_pipe(dc, pipe_ctx_old, dc->current_state); in dcn31_reset_hw_ctx_wrap()
597 link_enc_cfg_set_transient_mode(dc, dc->current_state, context); in dcn31_reset_hw_ctx_wrap()
/openbsd-src/sys/dev/pci/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c223 struct pipe_ctx *current_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[pipe_ctx->pipe_idx]; in dcn314_update_odm()
400 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn314_resync_fifo_dccg_dio()
415 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn314_resync_fifo_dccg_dio()
455 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in apply_symclk_on_tx_off_wa()
/openbsd-src/sys/dev/pci/drm/amd/display/dc/
H A Ddc_trace.h28 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[index]; \
/openbsd-src/sys/dev/pci/drm/amd/display/dc/inc/
H A Dlink_enc_cfg.h123 void link_enc_cfg_set_transient_mode(struct dc *dc, struct dc_state *current_state, struct dc_state…

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