| /openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 109 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Imm << 2))); in decodeCallOperand() 116 Inst.addOperand(MCOperand::createImm(SignExtend64<18>(Imm))); in decodeJumpOperand() 130 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeBranchOperand() 136 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeBranchOperand() 145 Inst.addOperand(MCOperand::createImm( in decodeL32ROperand() 153 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeImm8Operand() 161 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 8))); in decodeImm8_sh8Operand() 168 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeImm12Operand() 175 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm4Operand() 182 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm5Operand() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 563 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF() 569 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF() 584 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6() 598 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATI() 637 MI.addOperand(MCOperand::createImm(Imm)); in DecodeAddiGroupBranch() 671 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP35GroupBranchMMR6() 710 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDaddiGroupBranch() 744 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP37GroupBranchMMR6() 783 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP65GroupBranchMMR6() 822 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP75GroupBranchMMR6() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 601 Inst.addOperand(MCOperand::createImm(getImm())); in addImmOperands() 610 Inst.addOperand(MCOperand::createImm(getImm())); in addS16ImmOperands() 613 Inst.addOperand(MCOperand::createImm(getImmS16Context())); in addS16ImmOperands() 625 Inst.addOperand(MCOperand::createImm(getImm())); in addU16ImmOperands() 628 Inst.addOperand(MCOperand::createImm(getImmU16Context())); in addU16ImmOperands() 639 Inst.addOperand(MCOperand::createImm(getImm() / 4)); in addBranchTargetOperands() 788 Inst.addOperand(MCOperand::createImm(-Op.getImm())); in addNegOperand() 819 TmpInst.addOperand(MCOperand::createImm( in ProcessInstruction() 863 TmpInst.addOperand(MCOperand::createImm(L)); in ProcessInstruction() 922 TmpInst.addOperand(MCOperand::createImm(B)); in ProcessInstruction() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 175 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9() 193 Inst.addOperand(MCOperand::createImm(Offset)); in DecodeSymbolicOperandOff() 212 Inst.addOperand(MCOperand::createImm( in DecodeSignedOperand() 225 MCOperand::createImm(InsnS < max ? static_cast<int>(InsnS) : -1)); in DecodeFromCyclicRange() 241 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeStLImmInstruction() 242 Inst.addOperand(MCOperand::createImm(0)); in DecodeStLImmInstruction() 259 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeLdLImmInstruction() 260 Inst.addOperand(MCOperand::createImm(0)); in DecodeLdLImmInstruction() 277 Inst.addOperand(MCOperand::createImm((uint32_t)(Insn >> 32))); in DecodeLdRLImmInstruction() 294 Inst.addOperand(MCOperand::createImm(Value)); in DecodeMoveHRegInstruction() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget() 76 Inst.addOperand(MCOperand::createImm(Offset)); in decodeDirectBrTarget() 243 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 252 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 261 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand() 305 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands() 327 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands() 344 Inst.addOperand(MCOperand::createImm(Disp)); in decodeMemRIHashOperands() 360 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands() 375 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34PCRelOperands() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 355 MI.insert(MI.begin() + i, MCOperand::createImm(0)); in getInstruction() 700 Inst.addOperand(MCOperand::createImm(RegMask)); in DecodeMatrixTileListRegisterClass() 854 Inst.addOperand(MCOperand::createImm(64 - Imm)); in DecodeFixedPointScaleImm32() 861 Inst.addOperand(MCOperand::createImm(64 - Imm)); in DecodeFixedPointScaleImm64() 876 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel19() 883 Inst.addOperand(MCOperand::createImm((Imm >> 1) & 1)); in DecodeMemExtend() 884 Inst.addOperand(MCOperand::createImm(Imm & 1)); in DecodeMemExtend() 891 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMRSSystemRegister() 901 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMSRSystemRegister() 924 Inst.addOperand(MCOperand::createImm(1)); in DecodeFMOVLaneInstruction() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 99 MCOperand czero = MCOperand::createImm(0); in emitBSIC() 110 MCOperand CZero = MCOperand::createImm(0); in emitLEAzzi() 122 MCOperand CZero = MCOperand::createImm(0); in emitLEASLzzi() 134 MCOperand CZero = MCOperand::createImm(0); in emitLEAzii() 177 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo() 212 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETGOTAndEmitMCInsts() 216 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts() 260 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETFunPLTAndEmitMCInsts() 264 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETFunPLTAndEmitMCInsts() 308 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETTLSAddrAndEmitMCInsts() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 173 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 181 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 266 Inst.addOperand(MCOperand::createImm(Value)); in decodePCDBLOperand() 307 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand() 317 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand() 328 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand() 340 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand() 352 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand() 353 Inst.addOperand(MCOperand::createImm(Length + 1)); in decodeBDLAddr12Len4Operand() 364 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len8Operand() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 989 CCI = MI.insert(CCI, MCOperand::createImm(CC)); in AddThumbPredicate() 1007 VCCI = MI.insert(VCCI, MCOperand::createImm(VCC)); in AddThumbPredicate() 1641 Inst.addOperand(MCOperand::createImm(Val)); in DecodePredicateOperand() 1692 Inst.addOperand(MCOperand::createImm(Op)); in DecodeSORegImmOperand() 1728 Inst.addOperand(MCOperand::createImm(Shift)); in DecodeSORegRegOperand() 1856 Inst.addOperand(MCOperand::createImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand() 1946 Inst.addOperand(MCOperand::createImm(coproc)); in DecodeCopMemInstruction() 1947 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction() 1985 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction() 2008 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 141 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr() 157 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA() 165 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT() 166 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT() 175 Inst.addOperand(MCOperand::createImm(Field << 1)); in decodeCallTarget() 236 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK() 266 Inst.addOperand(MCOperand::createImm(Insn & 0x3f)); in decodeMemri() 286 Inst.addOperand(MCOperand::createImm(Offset)); in decodeFBRk() 304 Inst.addOperand(MCOperand::createImm(Offset)); in decodeLoadStore() 308 Inst.addOperand(MCOperand::createImm(Offset)); in decodeLoadStore() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust() 182 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue() 208 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue() 225 MI.addOperand(MCOperand::createImm(Insn)); in decodeBranch() 233 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm() 243 Inst.addOperand(MCOperand::createImm(Val)); in decodePredicateOperand()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVAsmPrinter.cpp | 259 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang))); in outputDebugSourceAndStrings() 261 MCOperand::createImm(static_cast<unsigned>(MAI->SrcLangVersion))); in outputDebugSourceAndStrings() 282 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr))); in outputOpMemoryModel() 283 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem))); in outputOpMemoryModel() 331 Inst.addOperand(MCOperand::createImm(Cap)); in outputGlobalRequirements() 395 Inst.addOperand(MCOperand::createImm(Const->getZExtValue())); in addOpsFromMDNode() 410 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM))); in outputExecutionModeFromMDNode() 445 Inst.addOperand(MCOperand::createImm(EM)); in outputExecutionMode() 447 Inst.addOperand(MCOperand::createImm(TypeCode)); in outputExecutionMode() 456 Inst.addOperand(MCOperand::createImm(EM)); in outputExecutionMode() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 396 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 399 MCOperand::createImm(static_cast<int32_t>(ConstExpr->getValue()))); in addExpr() 440 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegImmOperands() 448 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegRegOperands() 472 MCOperand::createImm(static_cast<int32_t>(ConstExpr->getValue()))); in addLoImm16Operands() 495 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() & 0xffff)); in addLoImm16AndOperands() 503 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() >> 16)); in addHiImm16Operands() 526 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() >> 16)); in addHiImm16AndOperands() 534 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() & 0x1fffff)); in addLoImm21Operands() 605 static std::unique_ptr<LanaiOperand> createImm(const MCExpr *Value, in createImm() function [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 89 return addOperand(Inst, MCOperand::createImm(Imm)); in decodeSoppBrTarget() 101 return addOperand(Inst, MCOperand::createImm(Offset)); in decodeSMEMOffset() 607 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction() 620 insertNamedMCOperand(MI, MCOperand::createImm(CPol), in getInstruction() 637 MI.insert(TFEIter, MCOperand::createImm(0)); in getInstruction() 648 MI.insert(SWZIter, MCOperand::createImm(0)); in getInstruction() 720 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vm); in convertEXPInst() 721 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::compr); in convertEXPInst() 733 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::op_sel); in convertVINTERPInst() 743 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::clamp); in convertSDWAInst() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 231 Inst.addOperand(MCOperand::createImm(Imm << S)); in decodeUImmOperand() 240 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeOImmOperand() 248 Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2)); in decodeLRW16Imm8() 251 Inst.addOperand(MCOperand::createImm(V << 2)); in decodeLRW16Imm8() 263 Inst.addOperand(MCOperand::createImm(16)); in decodeJMPIXImmOperand() 265 Inst.addOperand(MCOperand::createImm(24)); in decodeJMPIXImmOperand() 267 Inst.addOperand(MCOperand::createImm(32)); in decodeJMPIXImmOperand() 269 Inst.addOperand(MCOperand::createImm(40)); in decodeJMPIXImmOperand() 364 Inst.addOperand(MCOperand::createImm(Log2_64(Imm))); in decodeImmShiftOpValue() 374 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S)); in decodeSImmOperand()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 331 MI.addOperand(MCOperand::createImm(0)); in DecodeASX() 340 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX() 344 MI.addOperand(MCOperand::createImm(simm32)); in DecodeASX() 362 MI.addOperand(MCOperand::createImm(0)); in DecodeAS() 366 MI.addOperand(MCOperand::createImm(simm32)); in DecodeAS() 491 MI.addOperand(MCOperand::createImm(sy)); in DecodeCAS() 493 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS() 536 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM7() 543 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM32() 586 MI.addOperand(MCOperand::createImm(VEValToCondCode(cf, isIntegerBCKind(MI)))); in DecodeCCOperand() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 38 NopInst.addOperand(MCOperand::createImm(0)); in getNop() 39 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop() 45 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVMCInstLower.cpp | 106 MCOp = MCOperand::createImm(MO.getImm()); in lowerRISCVMachineOperandToMCOperand() 202 MCOp = MCOperand::createImm(MO.getImm()); in lowerRISCVVMachineInstrToMCInst() 245 OutMI.addOperand(MCOperand::createImm( in lowerRISCVMachineInstrToMCInst() 252 MCOperand::createImm(RISCVSysReg::lookupSysRegByName("VL")->Encoding)); in lowerRISCVMachineInstrToMCInst()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/Disassembler/ |
| H A D | WebAssemblyDisassembler.cpp | 103 MI.addOperand(MCOperand::createImm(Val)); in parseLEBImmediate() 118 MI.addOperand(MCOperand::createImm(static_cast<int64_t>(Val))); in parseImmediate() 230 MCOperand::createImm(int64_t(WebAssembly::BlockType::Invalid))); in getInstruction() 232 MI.addOperand(MCOperand::createImm(Val & 0x7f)); in getInstruction()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 300 ITInst.addOperand(MCOperand::createImm(ITState.Cond)); in flushPendingInstructions() 301 ITInst.addOperand(MCOperand::createImm(ITState.Mask)); in flushPendingInstructions() 2466 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 2468 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr() 2485 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); in addCondCodeOperands() 2492 Inst.addOperand(MCOperand::createImm(unsigned(getVPTPred()))); in addVPTPredNOperands() 2518 Inst.addOperand(MCOperand::createImm(getCoproc())); in addCoprocNumOperands() 2523 Inst.addOperand(MCOperand::createImm(getCoproc())); in addCoprocRegOperands() 2528 Inst.addOperand(MCOperand::createImm(CoprocOption.Val)); in addCoprocOptionOperands() 2533 Inst.addOperand(MCOperand::createImm(ITMask.Mask)); in addITMaskOperands() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 124 MI.addOperand(MCOperand::createImm(Imm)); in DecodeCGImm() 138 MI.addOperand(MCOperand::createImm((int16_t)Imm)); in DecodeMemOperand() 347 MI.addOperand(MCOperand::createImm(SignExtend32(Offset, 10))); in getInstructionCJ() 353 MI.addOperand(MCOperand::createImm(getCondCode(Cond))); in getInstructionCJ()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 108 Inst.addOperand(MCOperand::createImm(Imm + P)); in decodeUImmOperand() 119 Inst.addOperand(MCOperand::createImm(SignExtend64<N + S>(Imm << S))); in decodeSImmOperand()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 286 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand() 306 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand() 327 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm << 1))); in decodeSImmOperandAndLsl1() 338 Inst.addOperand(MCOperand::createImm(Imm)); in decodeCLUIImmOperand() 348 Inst.addOperand(MCOperand::createImm(Imm)); in decodeFRMArg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 204 Inst.addOperand(MCOperand::createImm(Values[Val])); in DecodeBitpOperand() 211 Inst.addOperand(MCOperand::createImm(-(int64_t)Val)); in DecodeNegImmOperand() 340 Inst.addOperand(MCOperand::createImm(Op1)); in Decode2RImmInstruction() 381 Inst.addOperand(MCOperand::createImm(Op2)); in DecodeRUSInstruction() 530 Inst.addOperand(MCOperand::createImm(Op1)); in Decode3RImmInstruction() 545 Inst.addOperand(MCOperand::createImm(Op3)); in Decode2RUSInstruction() 601 Inst.addOperand(MCOperand::createImm(Op3)); in DecodeL2RUSInstruction()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1682 Inst.addOperand(MCOperand::createImm(0)); in addExpr() 1684 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr() 1833 Inst.addOperand(MCOperand::createImm(RegMask)); in addMatrixTileListOperands() 1838 Inst.addOperand(MCOperand::createImm(getVectorIndex())); in addVectorIndexOperands() 1845 Inst.addOperand(MCOperand::createImm(bool(isExactFPImm<ImmIs1>()))); in addExactFPImmOperands() 1860 Inst.addOperand(MCOperand::createImm(ShiftedVal->first)); in addImmWithOptionalShiftOperands() 1861 Inst.addOperand(MCOperand::createImm(ShiftedVal->second)); in addImmWithOptionalShiftOperands() 1864 Inst.addOperand(MCOperand::createImm(getShiftedImmShift())); in addImmWithOptionalShiftOperands() 1867 Inst.addOperand(MCOperand::createImm(0)); in addImmWithOptionalShiftOperands() 1875 Inst.addOperand(MCOperand::createImm(-ShiftedVal->first)); in addImmNegWithOptionalShiftOperands() [all …]
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