Searched refs:buildZExt (Results 1 – 9 of 9) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 936 auto NewAmt = Helper.MIRBuilder.buildZExt(LLT::scalar(64), AmtReg); in legalizeRotate() 1339 MIRBuilder.buildZExt(Dst, Add); in legalizeCTPOP() 1359 Val = MIRBuilder.buildZExt(LLT::scalar(64), Val).getReg(0); in legalizeCTPOP() 1404 MIRBuilder.buildZExt(Dst, UADD); in legalizeCTPOP()
|
| H A D | AArch64CallLowering.cpp | 388 CurVReg = MIRBuilder.buildZExt(LLT::scalar(8), CurVReg).getReg(0); in lowerReturn() 1132 MIRBuilder.buildZExt(LLT::scalar(8), OutArg.Regs[0]).getReg(0); in lowerCall()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1076 MIRBuilder.buildZExt(DstReg, TmpReg); in narrowScalar() 1525 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1).getReg(0); in widenScalarMergeValues() 1533 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg); in widenScalarMergeValues() 1951 auto RHS = IsShift ? MIRBuilder.buildZExt(WideTy, MI.getOperand(2)) in widenScalarAddSubShlSat() 2845 auto ZextVal = B.buildZExt(TargetTy, InsertReg); in buildBitFieldInsert() 3404 auto ZExtCarryIn = MIRBuilder.buildZExt(Ty, CarryIn); in lower() 3433 auto ZExtBorrowIn = MIRBuilder.buildZExt(Ty, BorrowIn); in lower() 5104 CarrySum = B.buildZExt(NarrowTy, Uaddo.getReg(1)).getReg(0); in multiplyRegisters() 5109 MachineInstrBuilder Carry = B.buildZExt(NarrowTy, Uaddo.getReg(1)); in multiplyRegisters() 6232 R = MIRBuilder.buildZExt(DstTy, R); in lowerFPTOSI() [all …]
|
| H A D | CallLowering.cpp | 1176 MIRBuilder.buildZExt(NewReg, ValReg); in extendRegister()
|
| H A D | MachineIRBuilder.cpp | 462 MachineInstrBuilder MachineIRBuilder::buildZExt(const DstOp &Res, in buildZExt() function in MachineIRBuilder
|
| H A D | CombinerHelper.cpp | 1696 Builder.buildZExt(MI.getOperand(0), NarrowShift); in applyCombineShlOfExtend() 1905 Builder.buildZExt(Dst0Reg, ZExtSrcReg); in applyCombineUnmergeZExtToZExt() 4792 auto Ext = Builder.buildZExt(WideTy, NarrowBinOp); in matchNarrowBinopFeedingAnd()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 716 MachineInstrBuilder buildZExt(const DstOp &Res, const SrcOp &Op);
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 2231 B.buildZExt(NewSrcReg, MI.getOperand(4).getReg()); in applyMappingImpl() 2265 B.buildZExt(NewCondReg, CondRegs[0]); in applyMappingImpl() 2317 B.buildZExt(NewCondReg, CondReg); in applyMappingImpl()
|
| H A D | AMDGPULegalizerInfo.cpp | 2934 LocalAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply() 2940 CarryAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply() 3014 Tmp = B.buildZExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
|