Searched refs:buildNot (Results 1 – 5 of 5) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerLowering.cpp | 912 return MIB.buildNot(DstTy, FCmp).getReg(0); in getVectorFCMP()
1002 CmpRes = MIB.buildNot(DstTy, CmpRes).getReg(0); in lowerVectorFCMP()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 1670 MachineInstrBuilder buildNot(const DstOp &Dst, const SrcOp &Src0) { in buildNot() function
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2854 auto InvShiftedMask = B.buildNot(TargetTy, ShiftedMask); in buildBitFieldInsert()
5843 Z = MIRBuilder.buildNot(ShTy, Z).getReg(0); in lowerFunnelShiftWithInverse()
5884 auto NotZ = MIRBuilder.buildNot(ShTy, Z); in lowerFunnelShiftAsShifts()
7077 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax()
7517 auto NotMask = MIRBuilder.buildNot(MaskTy, MaskReg); in lowerSelect()
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| H A D | CombinerHelper.cpp | 3127 auto Not = Builder.buildNot(MRI.getType(X), X); in applyXorOfAndWithSameReg()
5894 MIB.buildOr(DstReg, MIB.buildNot(OpTy, Cond), TrueReg); in matchSelectToLogical()
5902 MIB.buildAnd(DstReg, MIB.buildNot(OpTy, Cond), FalseReg); in matchSelectToLogical()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2162 auto Not = B.buildNot(S64, Shr); in legalizeIntrinsicTrunc()
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