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Searched refs:buildInstr (Results 1 – 25 of 35) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h385 MachineInstrBuilder buildInstr(unsigned Opcode) { in buildInstr() function
500 return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1}); in buildPtrMask()
561 return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1}); in buildUAddo()
567 return buildInstr(TargetOpcode::G_USUBO, {Res, CarryOut}, {Op0, Op1}); in buildUSubo()
573 return buildInstr(TargetOpcode::G_SADDO, {Res, CarryOut}, {Op0, Op1}); in buildSAddo()
579 return buildInstr(TargetOpcode::G_SSUBO, {Res, CarryOut}, {Op0, Op1}); in buildSSubo()
599 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut}, in buildUAdde()
607 return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut}, in buildUSube()
615 return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut}, in buildSAdde()
623 return buildInstr(TargetOpcode::G_SSUBE, {Res, CarryOut}, in buildSSube()
[all …]
H A DCSEMIRBuilder.h95 buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps,
H A DLegalizationArtifactCombiner.h87 Builder.buildInstr(ExtMI->getOpcode(), {DstReg}, {ExtSrc}); in tryCombineAnyExt()
206 Builder.buildInstr(ExtMI->getOpcode(), {DstReg}, {ExtSrc}); in tryCombineSExt()
350 Builder.buildInstr(TargetOpcode::G_IMPLICIT_DEF, {DstReg}, {}); in tryFoldImplicitDef()
1075 Builder.buildInstr(ConvertOp, {DstRegs[k]}, {TmpRegs[k]}); in tryCombineUnmergeValues()
1120 Builder.buildInstr(ConvertOp, {DefReg}, {MergeSrc}); in tryCombineUnmergeValues()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp83 return buildInstr(TargetOpcode::DBG_VALUE) in buildFIDbgValue()
129 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel()
138 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc()
148 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex()
161 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue()
169 return buildInstr(TargetOpcode::G_JUMP_TABLE, {PtrTy}, {}) in buildJumpTable()
197 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}); in buildPtrAdd()
269 return buildInstr(TargetOpcode::G_BR).addMBB(&Dest); in buildBr()
274 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); in buildBrIndirect()
282 return buildInstr(TargetOpcode::G_BRJT) in buildBrJT()
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H A DCSEMIRBuilder.cpp170 MachineInstrBuilder CSEMIRBuilder::buildInstr(unsigned Opc, in buildInstr() function in CSEMIRBuilder
278 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
282 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
299 MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
H A DIRTranslator.cpp309 MIRBuilder.buildInstr(Opcode, {Res}, {Op0, Op1}, Flags); in translateBinaryOp()
322 MIRBuilder.buildInstr(Opcode, {Res}, {Op0}, Flags); in translateUnaryOp()
1481 MIRBuilder.buildInstr(Opcode, {Res}, {Op}); in translateCast()
1608 auto ICall = MIRBuilder.buildInstr(Opcode); in translateMemFunc()
1678 MIRBuilder.buildInstr(TargetOpcode::LOAD_STACK_GUARD, {DstReg}, {}); in getStackGuard()
1699 MIRBuilder.buildInstr( in translateOverflowIntrinsic()
1712 MIRBuilder.buildInstr(Op, {Dst}, { Src0, Src1, Scale }); in translateFixedPointIntrinsic()
1832 MIRBuilder.buildInstr(Op, {getOrCreateVReg(CI)}, VRegs, in translateSimpleIntrinsic()
1878 MIRBuilder.buildInstr(Opcode, {getOrCreateVReg(FPI)}, VRegs, Flags); in translateConstrainedFPIntrinsic()
1925 MIRBuilder.buildInstr(Op).addFrameIndex(getOrCreateFrameIndex(*AI)); in translateKnownIntrinsic()
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H A DLegalizerHelper.cpp1187 MIRBuilder.buildInstr(TargetOpcode::G_PHI).addDef(DstRegs[i]); in narrowScalar()
1359 .buildInstr( in narrowScalar()
1384 auto DstPart = MIRBuilder.buildInstr(MI.getOpcode(), {NarrowTy}, in narrowScalar()
1442 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO}); in widenScalarSrc()
1458 MIRBuilder.buildInstr(TruncOpcode, {MO}, {DstExt}); in widenScalarDst()
1467 MIRBuilder.buildInstr(ExtOpcode, {MO}, {DstTrunc}); in narrowScalarDst()
1718 auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_UNMERGE_VALUES); in widenScalarUnmergeValues()
1902 auto LHSExt = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MI.getOperand(2)}); in widenScalarAddSubOverflow()
1903 auto RHSExt = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MI.getOperand(3)}); in widenScalarAddSubOverflow()
1909 .buildInstr(Opcode, {WideTy, CarryOutTy}, in widenScalarAddSubOverflow()
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H A DCombinerHelper.cpp1093 auto MIB = MIRBuilder.buildInstr(NewOpcode); in applyCombineIndexedLoadStore()
1198 Builder.buildInstr(IsSigned ? TargetOpcode::G_SDIVREM in applyCombineDivRem()
1600 Builder.buildInstr(Opcode, {DestType}, {Shift1Base, Const}).getReg(0); in applyShiftOfShiftedLogic()
1611 .buildInstr(Opcode, {DestType}, in applyShiftOfShiftedLogic()
1616 Builder.buildInstr(MatchInfo.Logic->getOpcode(), {Dest}, {Shift1, Shift2}); in applyShiftOfShiftedLogic()
2200 Builder.buildInstr(SrcExtOp, {DstReg}, {Reg}); in applyCombineExtOfExt()
2263 Builder.buildInstr(SrcExtOp, {DstReg}, {SrcReg}); in applyCombineTruncOfExt()
2363 .buildInstr(ShiftMI->getOpcode(), {NewShiftTy}, {ShiftSrc, ShiftAmt}) in applyCombineTruncOfShift()
2813 MachineInstrBuilder Instr = Builder.buildInstr(InstrToBuild.Opcode); in applyBuildInstructionSteps()
3255 FoldTrue = Builder.buildInstr(BinOpcode, {Ty}, {SelectTrue, RHS}).getReg(0); in applyFoldBinOpIntoSelect()
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/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.cpp455 MIRBuilder.buildInstr(SPIRV::OpStore) in buildAtomicInitInst()
486 MIRBuilder.buildInstr(SPIRV::OpAtomicLoad) in buildAtomicLoadInst()
507 MIRBuilder.buildInstr(SPIRV::OpAtomicStore) in buildAtomicStoreInst()
597 MIRBuilder.buildInstr(Opcode) in buildAtomicCompareExchangeInst()
607 MIRBuilder.buildInstr(SPIRV::OpStore).addUse(ExpectedArg).addUse(Tmp); in buildAtomicCompareExchangeInst()
641 MIRBuilder.buildInstr(Opcode) in buildAtomicRMWInst()
683 auto MIB = MIRBuilder.buildInstr(Opcode); in buildAtomicFlagInst()
748 auto MIB = MIRBuilder.buildInstr(Opcode).addUse(ScopeReg); in buildBarrierInst()
794 MIRBuilder.buildInstr(SPIRV::OpExtInst) in generateExtInst()
819 auto MIB = MIRBuilder.buildInstr(Opcode) in generateRelationalInst()
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H A DSPIRVGlobalRegistry.cpp76 return MIRBuilder.buildInstr(SPIRV::OpTypeBool) in getOpTypeBool()
83 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeInt) in getOpTypeInt()
92 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeFloat) in getOpTypeFloat()
99 return MIRBuilder.buildInstr(SPIRV::OpTypeVoid) in getOpTypeVoid()
111 auto MIB = MIRBuilder.buildInstr(SPIRV::OpTypeVector) in getOpTypeVector()
204 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantI) in buildConstantInt()
210 MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull) in buildConstantInt()
342 auto MIB = MIRBuilder.buildInstr(SPIRV::OpConstantComposite) in getOrCreateIntCompositeOrNull()
348 MIRBuilder.buildInstr(SPIRV::OpConstantNull) in getOrCreateIntCompositeOrNull()
405 MIRBuilder.buildInstr(SPIRV::OpConstantNull) in getOrCreateConstNullPtr()
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H A DSPIRVCallLowering.cpp42 return MIRBuilder.buildInstr(SPIRV::OpReturnValue) in lowerReturn()
47 MIRBuilder.buildInstr(SPIRV::OpReturn); in lowerReturn()
316 MIRBuilder.buildInstr(SPIRV::OpFunction) in lowerFormalArguments()
327 MIRBuilder.buildInstr(SPIRV::OpFunctionParameter) in lowerFormalArguments()
340 auto MIB = MIRBuilder.buildInstr(SPIRV::OpEntryPoint) in lowerFormalArguments()
429 auto MIB = MIRBuilder.buildInstr(SPIRV::OpFunctionCall) in lowerCall()
H A DSPIRVUtils.cpp103 auto MIB = MIRBuilder.buildInstr(SPIRV::OpName).addUse(Target); in buildOpName()
120 auto MIB = MIRBuilder.buildInstr(SPIRV::OpDecorate) in buildOpDecorate()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerLowering.cpp441 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, MatchInfo.SrcOps); in applyShuffleVectorPseudo()
454 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, in applyEXT()
549 MIB.buildInstr(NewOpc, {MI.getOperand(0)}, {MI.getOperand(1), ImmDef}); in applyVAshrLshrImm()
759 B.buildInstr(MatchInfo.first, {MI.getOperand(0).getReg()}, {DupSrc, Lane}); in applyDupLane()
781 B.buildInstr(AArch64::G_DUP, {MI.getOperand(0).getReg()}, in applyBuildVectorToDup()
910 ? MIB.buildInstr(AArch64::G_FCMEQZ, {DstTy}, {LHS}) in getVectorFCMP()
911 : MIB.buildInstr(AArch64::G_FCMEQ, {DstTy}, {LHS, RHS}); in getVectorFCMP()
917 ? MIB.buildInstr(AArch64::G_FCMEQZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
918 : MIB.buildInstr(AArch64::G_FCMEQ, {DstTy}, {LHS, RHS}) in getVectorFCMP()
924 ? MIB.buildInstr(AArch64::G_FCMGEZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
[all …]
H A DAArch64InstructionSelector.cpp651 MIB.buildInstr(TargetOpcode::REG_SEQUENCE, {DesiredClass}, {}); in createTuple()
868 MIB.buildInstr(TargetOpcode::COPY, {To}, {}).addReg(SrcReg, 0, SubReg); in copySubReg()
1126 auto FCSel = MIB.buildInstr(Opc, {Dst}, {True, False}).addImm(CC); in emitSelect()
1275 auto SelectInst = MIB.buildInstr(Opc, {Dst}, {True, False}).addImm(CC); in emitSelect()
1551 MIB.buildInstr(Opc).addReg(TestReg).addImm(Bit).addMBB(DstMBB); in emitTestBit()
1613 auto BranchMI = MIB.buildInstr(Opc, {}, {CompareReg}).addMBB(DestMBB); in emitCBZ()
1630 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC1).addMBB(DestMBB); in selectCompareBranchFedByFCmp()
1632 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC2).addMBB(DestMBB); in selectCompareBranchFedByFCmp()
1745 MIB.buildInstr(AArch64::Bcc, {}, {}).addImm(CC).addMBB(DestMBB); in selectCompareBranchFedByICmp()
1774 MIB.buildInstr(AArch64::ANDSWri, {LLT::scalar(32)}, {CondReg}).addImm(1); in selectCompareBranch()
[all …]
H A DAArch64LegalizerInfo.cpp1012 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {}) in legalizeSmallCMGlobalValue()
1033 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP}) in legalizeSmallCMGlobalValue()
1040 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP}) in legalizeSmallCMGlobalValue()
1107 MIB.buildInstr(AArch64::G_PREFETCH).addImm(PrfOp).add(AddrVal); in legalizeIntrinsic()
1125 MIB.buildInstr(AArch64::G_PREFETCH).addImm(PrfOp).add(AddrVal); in legalizeIntrinsic()
1199 NewI = MIRBuilder.buildInstr(AArch64::LDPXi, {s64, s64}, {}); in legalizeLoadStore()
1204 NewI = MIRBuilder.buildInstr( in legalizeLoadStore()
1454 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASDesired}, {}) in legalizeAtomicCmpxchg128()
1459 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASNew}, {}) in legalizeAtomicCmpxchg128()
1465 CAS = MIRBuilder.buildInstr(Opcode, {CASDst}, {CASDesired, CASNew, Addr}); in legalizeAtomicCmpxchg128()
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H A DAArch64CallLowering.cpp420 CurVReg = MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}) in lowerReturn()
442 CurVReg = MIRBuilder.buildInstr(ExtendOp, {NewLLT}, {CurVReg}) in lowerReturn()
973 CallSeqStart = MIRBuilder.buildInstr(AArch64::ADJCALLSTACKDOWN); in lowerTailCall()
1087 MIRBuilder.buildInstr(AArch64::ADJCALLSTACKUP).addImm(0).addImm(0); in lowerTailCall()
1166 CallSeqStart = MIRBuilder.buildInstr(AArch64::ADJCALLSTACKDOWN); in lowerCall()
1265 MIRBuilder.buildInstr(AArch64::ADJCALLSTACKUP) in lowerCall()
H A DAArch64GlobalISelUtils.cpp91 .buildInstr(TargetOpcode::G_BZERO, {}, in tryEmitBZero()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUPostLegalizerCombiner.cpp117 B.buildInstr(Opc, {MI.getOperand(0)}, {X, Y}, MI.getFlags()); in applySelectFCmpToFMinToFMaxLegacy()
194 B.buildInstr(AMDGPU::G_AMDGPU_CVT_F32_UBYTE0, {DstReg}, in applyUCharToFloat()
197 auto Cvt0 = B.buildInstr(AMDGPU::G_AMDGPU_CVT_F32_UBYTE0, {S32}, in applyUCharToFloat()
291 B.buildInstr(NewOpc, {MI.getOperand(0)}, {CvtSrc}, MI.getFlags()); in applyCvtF32UByteN()
H A DAMDGPUPreLegalizerCombiner.cpp137 B.buildInstr(AMDGPU::G_AMDGPU_CVT_PK_I16_I32, {V2S16}, in applyClampI64ToI16()
147 auto Med3 = B.buildInstr( in applyClampI64ToI16()
H A DAMDGPUCallLowering.cpp218 SPReg = MIRBuilder.buildInstr(AMDGPU::G_AMDGPU_WAVE_ADDRESS, {PtrTy}, in getStackAddress()
339 Reg = B.buildInstr(ExtendOp, {ExtTy}, {Reg}).getReg(0); in lowerReturnVal()
375 B.buildInstr(AMDGPU::S_ENDPGM) in lowerReturn()
1185 CallSeqStart = MIRBuilder.buildInstr(AMDGPU::ADJCALLSTACKUP); in lowerTailCall()
1278 MIRBuilder.buildInstr(AMDGPU::ADJCALLSTACKDOWN).addImm(NumBytes).addImm(0); in lowerTailCall()
1345 MIRBuilder.buildInstr(AMDGPU::ADJCALLSTACKUP) in lowerCall()
1426 MIRBuilder.buildInstr(AMDGPU::ADJCALLSTACKDOWN) in lowerCall()
H A DAMDGPURegisterBankInfo.cpp656 B.buildInstr(AMDGPU::G_UNMERGE_VALUES) in split64BitValueForMapping()
725 B.buildInstr(AMDGPU::V_READFIRSTLANE_B32, {DstPart}, {SrcPart}); in buildReadFirstLane()
790 B.buildInstr(TargetOpcode::IMPLICIT_DEF) in executeInWaterfallLoop()
822 B.buildInstr(TargetOpcode::PHI) in executeInWaterfallLoop()
931 B.buildInstr(AndSaveExecOpc) in executeInWaterfallLoop()
940 B.buildInstr(XorTermOpc) in executeInWaterfallLoop()
949 B.buildInstr(AMDGPU::SI_WATERFALL_LOOP).addMBB(LoopBB); in executeInWaterfallLoop()
957 B.buildInstr(MovExecTermOpc) in executeInWaterfallLoop()
1411 B.buildInstr(AMDGPU::G_AMDGPU_BUFFER_LOAD) in applyMappingSBufferLoad()
1552 auto MIB = B.buildInstr(Opc, {DstReg}, {SrcReg, MergedInputs}); in applyMappingBFE()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp150 B.buildInstr(Mips::ORi, {DestReg}, {Register(Mips::ZERO)}) in materialize32BitImm()
156 MachineInstr *Inst = B.buildInstr(Mips::LUi, {DestReg}, {}) in materialize32BitImm()
163 B.buildInstr(Mips::ADDiu, {DestReg}, {Register(Mips::ZERO)}) in materialize32BitImm()
169 MachineInstr *LUi = B.buildInstr(Mips::LUi, {LUiReg}, {}) in materialize32BitImm()
171 MachineInstr *ORi = B.buildInstr(Mips::ORi, {DestReg}, {LUiReg}) in materialize32BitImm()
604 B.buildInstr(Mips::MTC1, {I.getOperand(0).getReg()}, {GPRReg}); in select()
617 MachineInstrBuilder PairF64 = B.buildInstr( in select()
806 MachineInstrBuilder MIB = B.buildInstr( in select()
H A DMipsLegalizerInfo.cpp471 if (!MIRBuilder.buildInstr(Opcode) in SelectMSA3OpIntrinsic()
486 MIRBuilder.buildInstr(Opcode) in MSA3OpIntrinsicToGeneric()
498 MIRBuilder.buildInstr(Opcode) in MSA2OpIntrinsicToGeneric()
515 MachineInstr *Trap = MIRBuilder.buildInstr(Mips::TRAP); in legalizeIntrinsic()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86CallLowering.cpp321 auto CallSeqStart = MIRBuilder.buildInstr(AdjStackDown); in lowerCall()
363 MIRBuilder.buildInstr(X86::MOV8ri) in lowerCall()
409 MIRBuilder.buildInstr(AdjStackUp) in lowerCall()
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp189 auto CallSeqStart = MIRBuilder.buildInstr(AdjStackDown); in lowerCall()
227 MIRBuilder.buildInstr(AdjStackUp).addImm(Assigner.StackOffset).addImm(0); in lowerCall()

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