Searched refs:buildBuildVector (Results 1 – 11 of 11) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEMIRBuilder.cpp | 273 return buildBuildVector(DstOps[0], ConstantRegs); in buildInstr()
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| H A D | CallLowering.cpp | 451 B.buildBuildVector(OrigRegs[0], Regs); in buildCopyFromRegs() 469 B.buildBuildVector(OrigRegs[0], EltMerges); in buildCopyFromRegs() 474 auto BV = B.buildBuildVector(BVType, Regs); in buildCopyFromRegs()
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| H A D | CombinerHelper.cpp | 293 Builder.buildBuildVector(NewDstReg, Ops); in applyCombineConcatVectors() 2701 Builder.buildBuildVector(MI.getOperand(0).getReg(), MatchInfo); in applyCombineInsertVecElts() 4997 PreShift = MIB.buildBuildVector(ShiftAmtTy, PreShifts).getReg(0); in buildUDivUsingMul() 4998 MagicFactor = MIB.buildBuildVector(Ty, MagicFactors).getReg(0); in buildUDivUsingMul() 4999 NPQFactor = MIB.buildBuildVector(Ty, NPQFactors).getReg(0); in buildUDivUsingMul() 5000 PostShift = MIB.buildBuildVector(ShiftAmtTy, PostShifts).getReg(0); in buildUDivUsingMul() 5171 Shift = MIB.buildBuildVector(ShiftAmtTy, Shifts).getReg(0); in buildSDivUsingMul() 5172 Factor = MIB.buildBuildVector(Ty, Factors).getReg(0); in buildSDivUsingMul()
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| H A D | IRTranslator.cpp | 3074 EntryBuilder->buildBuildVector(Reg, Ops); in translate() 3084 EntryBuilder->buildBuildVector(Reg, Ops); in translate() 3101 EntryBuilder->buildBuildVector(Reg, Ops); in translate()
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| H A D | LegalizerHelper.cpp | 268 MIRBuilder.buildBuildVector(DstReg, PartRegs); in insertParts() 943 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalar() 2781 auto NewVec = MIRBuilder.buildBuildVector(MidTy, NewOps); in bitcastExtractVectorElt() 4395 Output = MIRBuilder.buildBuildVector(NarrowTy, SVOps).getReg(0); in fewerElementsVectorShuffle() 5005 MIRBuilder.buildBuildVector(DstReg, Elts); in equalizeVectorShuffleLengths() 5334 MIRBuilder.buildBuildVector(DstReg, DstRegs); in narrowScalarExtract() 6781 MIRBuilder.buildBuildVector(DstReg, BuildVec); in lowerShuffleVector()
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| H A D | MachineIRBuilder.cpp | 666 MachineInstrBuilder MachineIRBuilder::buildBuildVector(const DstOp &Res, in buildBuildVector() function in MachineIRBuilder
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2715 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg() 4316 return B.buildBuildVector(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData() 4326 return B.buildBuildVector(LLT::fixed_vector(2, S32), PackedRegs) in handleD16VData() 4336 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData() 4347 return B.buildBuildVector(LLT::fixed_vector(4, S32), PackedRegs) in handleD16VData() 4794 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords() 4815 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords() 4819 B.buildBuildVector( in packImage16bitOpsToDwords() 4846 B.buildBuildVector(LLT::fixed_vector(NumAddrRegs, 32), AddrRegs); in convertImageAddrToPacked() 4950 auto Concat = B.buildBuildVector(PackedTy, {VData0, VData1}); in legalizeImageIntrinsic() [all …]
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| H A D | AMDGPURegisterBankInfo.cpp | 2103 B.buildBuildVector(MI.getOperand(0), Ops); in foldInsertEltToCmpSelect() 2105 auto Vec = B.buildBuildVector(MergeTy, Ops); in foldInsertEltToCmpSelect()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 430 .buildBuildVector({NewLLT}, {CurVReg, Undef.getReg(0)}) in lowerReturn()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 644 return MIB.buildBuildVector(NewBVTy, NewSrcs).getReg(0); in findValueFromBuildVector()
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| H A D | MachineIRBuilder.h | 1033 MachineInstrBuilder buildBuildVector(const DstOp &Res,
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