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/openbsd-src/gnu/lib/libstdc++/libstdc++/testsuite/21_strings/
H A Dcapacity.cc191 bool b01; in test01() local
193 b01 = str01.empty(); in test01()
194 VERIFY( b01 == true ); in test01()
224 b01 = str01.empty(); in test01()
225 VERIFY( b01 == true ); in test01()
231 b01 = str02.empty(); in test01()
232 VERIFY( b01 == true ); in test01()
246 b01 = str02.empty(); in test01()
247 VERIFY( b01 == true ); in test01()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SMEInstrInfo.td303 defm FMLSL_MZZI : sme2_mla_long_array_index<"fmlsl", 0b10, 0b01, nxv8f16, int_aarch64_sme_f…
304 defm FMLSL_VG2_M2ZZI : sme2_fp_mla_long_array_vg2_index<"fmlsl", 0b01, nxv8f16, int_aarch64_sme_f…
305 defm FMLSL_VG4_M4ZZI : sme2_fp_mla_long_array_vg4_index<"fmlsl", 0b01, nxv8f16, int_aarch64_sme_f…
306 defm FMLSL_MZZ : sme2_mla_long_array_single<"fmlsl", 0b00, 0b01, nxv8f16, int_aarch64_sme_f…
307 defm FMLSL_VG2_M2ZZ : sme2_fp_mla_long_array_vg2_single<"fmlsl", 0b01, nxv8f16, int_aarch64_sme_f…
308 defm FMLSL_VG4_M4ZZ : sme2_fp_mla_long_array_vg4_single<"fmlsl", 0b01, nxv8f16, int_aarch64_sme_f…
309 defm FMLSL_VG2_M2Z2Z : sme2_fp_mla_long_array_vg2_multi<"fmlsl", 0b01, nxv8f16, int_aarch64_sme_f…
310 defm FMLSL_VG4_M4Z4Z : sme2_fp_mla_long_array_vg4_multi<"fmlsl", 0b01, nxv8f16, int_aarch64_sme_f…
333 defm SMLAL_MZZ : sme2_mla_long_array_single<"smlal",0b01, 0b00, nxv8i16, int_aarch64_sme_s…
339 defm SMLSL_MZZI : sme2_mla_long_array_index<"smlsl", 0b11, 0b01, nxv8i16, int_aarch64_sme_s…
[all …]
H A DAArch64SVEInstrInfo.td436 defm ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr", or>;
487 defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon", xor>;
493 defm UMAX_ZI : sve_int_arith_imm1_unsigned<0b01, "umax", AArch64umax_p>;
656 defm FMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b01, "fmls", "FMLS_ZPZZZ", AArch64fmls_m1, "FMSB_ZPmZZ">;
661 …defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb", int_aarch64_sve_fmsb, "FMLS_ZPmZZ", /*isRever…
715 defm FMLS_ZZZI : sve_fp_fma_by_indexed_elem<0b01, "fmls", int_aarch64_sve_fmls_lane>;
846 defm SUNPKHI_ZZ : sve_int_perm_unpk<0b01, "sunpkhi", AArch64sunpkhi>;
870 defm BRKPB_PPzPP : sve_int_brkp<0b01, "brkpb", int_aarch64_sve_brkpb_z>;
942 defm LD1RB_H_IMM : sve_mem_ld_dup<0b00, 0b01, "ld1rb", Z_h, ZPR16, uimm6s1>;
945 defm LD1RSW_IMM : sve_mem_ld_dup<0b01, 0b00, "ld1rsw", Z_d, ZPR64, uimm6s4>;
[all …]
H A DSVEInstrFormats.td336 def _H : sve_int_ptrue<0b01, opc, asm, PPR16, nxv8i1, op>;
732 def _B : sve_int_pfirst_next<0b01, opc, asm, PPR8>;
739 def _H : sve_int_pfirst_next<0b01, opc, asm, PPR16>;
780 def _H : sve_int_count_r<0b01, opc, asm, GPR64z, PPR16, GPR64as32>;
808 def _H : sve_int_count_r<0b01, opc, asm, GPR32z, PPR16, GPR32z>;
826 def _H : sve_int_count_r<0b01, opc, asm, GPR64z, PPR16, GPR64z>;
884 def _H : sve_int_count_v<0b01, opc, asm, ZPR16, PPR16>;
923 def _H : sve_int_pcount_pred<0b01, opc, asm, PPR16>;
1165 def _H : sve_int_perm_dup_r<0b01, asm, ZPR16, nxv8i16, GPR32sp, op>;
1303 def _H : sve_int_perm_tbl<0b01, 0b10, asm, ZPR16, Z_h>;
[all …]
H A DAArch64InstrInfo.td1150 def SHA512H2 : CryptoRRRTied<0b0, 0b01, "sha512h2">;
1155 def BCAX : CryptoRRRR_16B<0b01, "bcax">;
1218 def SM3TT1B : CryptoRRRi2Tied<0b0, 0b01, "sm3tt1b">;
1223 def SM3PARTW2 : CryptoRRRTied_4S<0b1, 0b01, "sm3partw2">;
1225 def SM4E : CryptoRRTied_4S<0b0, 0b01, "sm4e">;
1257 def LDAPRH : RCPCLoad<0b01, "ldaprh", GPR32>;
1408 def IB : SignAuthOneData<prefix, 0b01, !strconcat(asm, "ib"), op>;
1413 def IZB : SignAuthZero<prefix_z, 0b01, !strconcat(asm, "izb"), op>;
1463 def FJCVTZS : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
1867 defm LSRV : Shift<0b01, "lsr", srl>;
[all …]
H A DAArch64InstrFormats.td1831 let Inst{20-19} = 0b01;
1846 let Inst{20-19} = 0b01;
3424 let Inst{25-24} = 0b01;
4279 let Inst{11-10} = 0b01;
4649 : BaseMemTag<0b01, 0b00, asm_insn, asm_opnds, "$Rt = $wback",
4683 BaseMemTagStore<opc1, 0b01, insn, "\t$Rt, [$Rn], $offset",
4798 def UWDr : BaseFPToIntegerUnscaled<0b01, rmode, opcode, FPR64, GPR32, asm,
4804 def UXDr : BaseFPToIntegerUnscaled<0b01, rmode, opcode, FPR64, GPR64, asm,
4849 def SWDri : BaseFPToInteger<0b01, rmode, opcode, FPR64, GPR32,
4858 def SXDri : BaseFPToInteger<0b01, rmode, opcode, FPR64, GPR64,
[all …]
H A DSMEInstrFormats.td476 def _H : sme_mem_ld_ss_inst<0b0, 0b01, mnemonic # "h",
614 def _H : sme_mem_st_ss_inst<0b0, 0b01, mnemonic # "h",
827 def _H : sme_vector_to_tile_inst<0b0, 0b01, !if(is_col, TileVectorOpV16,
1012 def _H : sme_tile_to_vector_inst<0b0, 0b01, ZPR16, !if(is_col, TileVectorOpV16,
1220 def _H : sve2_clamp<asm, 0b01, U, ZPR16>;
1242 let Inst{15-14} = 0b01;
1564 def _H : sme2_sve_destructive_vector_vg2_single<0b01, op, ZZ_h_mul_r, ZPR4b16, mnemonic>;
1571 def _H : sme2_sve_destructive_vector_vg2_single<0b01, op, ZZ_h_mul_r, ZPR4b16, mnemonic>;
1605 def _H : sme2_sve_destructive_vector_vg4_single<0b01, op, ZZZZ_h_mul_r, ZPR4b16, mnemonic>;
1612 def _H : sme2_sve_destructive_vector_vg4_single<0b01, op, ZZZZ_h_mul_r, ZPR4b16, mnemonic>;
[all …]
H A DAArch64SystemOperands.td250 def : PRFM<"pld", 0b00, "l2", 0b01, "keep", 0b0>;
251 def : PRFM<"pld", 0b00, "l2", 0b01, "strm", 0b1>;
258 def : PRFM<"pli", 0b01, "l1", 0b00, "keep", 0b0>;
259 def : PRFM<"pli", 0b01, "l1", 0b00, "strm", 0b1>;
260 def : PRFM<"pli", 0b01, "l2", 0b01, "keep", 0b0>;
261 def : PRFM<"pli", 0b01, "l2", 0b01, "strm", 0b1>;
262 def : PRFM<"pli", 0b01, "l3", 0b10, "keep", 0b0>;
263 def : PRFM<"pli", 0b01, "l3", 0b10, "strm", 0b1>;
265 def : PRFM<"pli", 0b01, "slc", 0b11, "keep", 0b0>;
266 def : PRFM<"pli", 0b01, "slc", 0b11, "strm", 0b1>;
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats16Instr.td45 let Inst{15, 14} = 0b01;
58 let Inst{15, 14} = 0b01;
71 let Inst{15, 14} = 0b01;
84 let Inst{15, 14} = 0b01;
96 let Inst{15, 14} = 0b01;
109 let Inst{15, 14} = 0b01;
120 let Inst{15, 14} = 0b01;
178 let Inst{15, 14} = 0b01;
216 let Inst{15, 14} = 0b01;
H A DCSKYInstrInfo16Instr.td65 def ADDC16 : R16_XZ_BINOP_C<0b1000, 0b01, "addc16">;
73 def XOR16 : R16_XZ_BINOP<0b1011, 0b01, "xor16", BinOpFrag<(xor node:$LHS, node:$RHS)>>;
80 def ANDN16 : R16_XZ_BINOP<0b1010, 0b01, "andn16", BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
82 def LSR16 : R16_XZ_BINOP<0b1100, 0b01, "lsr16", BinOpFrag<(srl node:$LHS, node:$RHS)>>;
86 def MULSH16 : R16_XZ_BINOP_NOPat<0b1111, 0b01, "mulsh16">;
89 def ZEXTH16 : R16_XZ_UNOP<0b1101, 0b01, "zexth16">;
179 let Inst{15,14} = 0b01;
190 let Inst{15,14} = 0b01;
218 def JSR16 : R16_X_J<0b11101111, 0b01, "jsr16"> {
290 let Inst{15, 14} = 0b01;
[all …]
H A DCSKYInstrFormatsF2.td73 def _RZ : F2_XZ_P<datatype, {sop, 0b01}, op#".rz", [], outs, ins>;
137 : F2_LDST<0b01, sop, op#".64", outs, ins>;
157 : F2_LDSTM<0b01, sop, sop2, op#".64", outs, ins>;
181 : F2_LDSTR<0b01, sop, op#".64", outs, ins>;
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoC.td264 : RVInst16CB<funct3, 0b01, (outs), (ins cls:$rs1, simm9_lsb0:$imm),
278 : RVInst16CB<0b100, 0b01, (outs cls:$rs1_wb), (ins cls:$rs1, ImmOpnd:$imm),
289 : RVInst16CA<funct6, funct2, 0b01, (outs cls:$rd_wb), (ins cls:$rd, cls:$rs2),
383 def C_NOP : RVInst16CI<0b000, 0b01, (outs), (ins), "c.nop", "">,
390 def C_ADDI : RVInst16CI<0b000, 0b01, (outs GPRNoX0:$rd_wb),
399 def C_ADDI_NOP : RVInst16CI<0b000, 0b01, (outs GPRX0:$rd_wb),
411 def C_JAL : RVInst16CJ<0b001, 0b01, (outs), (ins simm12_lsb0:$offset),
416 def C_ADDIW : RVInst16CI<0b001, 0b01, (outs GPRNoX0:$rd_wb),
425 def C_LI : RVInst16CI<0b010, 0b01, (outs GPRNoX0:$rd), (ins simm6:$imm),
432 def C_ADDI16SP : RVInst16CI<0b011, 0b01, (outs SP:$rd_wb),
[all …]
H A DRISCVInstrInfoD.td105 defm FMADD_D : FPFMA_rrr_frm_m<OPC_MADD, 0b01, "fmadd.d", DINX>;
106 defm FMSUB_D : FPFMA_rrr_frm_m<OPC_MSUB, 0b01, "fmsub.d", DINX>;
107 defm FNMSUB_D : FPFMA_rrr_frm_m<OPC_NMSUB, 0b01, "fnmsub.d", DINX>;
108 defm FNMADD_D : FPFMA_rrr_frm_m<OPC_NMADD, 0b01, "fnmadd.d", DINX>;
H A DRISCVInstrFormatsV.td29 def MOPLDIndexedUnord : RISCVMOP<0b01>;
34 def MOPSTIndexedUnord : RISCVMOP<0b01>;
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td408 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
413 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
418 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
423 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
428 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
433 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
442 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
447 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
452 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
457 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrVFP.td154 def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$Dd), (ins addrmode5:$addr),
159 def VLDRS : ASI5<0b1101, 0b01, (outs SPR:$Sd), (ins addrmode5:$addr),
169 def VLDRH : AHI5<0b1101, 0b01, (outs HPR:$Sd), (ins addrmode5fp16:$addr),
234 let Inst{24-23} = 0b01; // Increment After
243 let Inst{24-23} = 0b01; // Increment After
262 let Inst{24-23} = 0b01; // Increment After
275 let Inst{24-23} = 0b01; // Increment After
369 let Inst{24-23} = 0b01; // Increment After
376 let Inst{24-23} = 0b01; // Increment After
551 defm VSELVS : vsel_inst<"vs", 0b01, 6>;
[all …]
H A DARMInstrNEON.td3322 def v4i16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 0, op4,
3336 def v4f16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 0, op4,
3349 def v8i16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 1, op4,
3363 def v8f16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 1, op4,
3406 def v4i16 : N3VD_cmp<op24, op23, 0b01, op11_8, op4, itinD16,
3417 def v8i16 : N3VQ_cmp<op24, op23, 0b01, op11_8, op4, itinQ16,
3435 def v4i16 : N2VDInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4,
3443 def v8i16 : N2VQInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4,
3459 def v4i16 : N2VN<op24_23, op21_20, 0b01, op17_16, op11_7, op6, op4,
3476 def v4i16 : N2VNInt<op24_23, op21_20, 0b01, op17_16, op11_7, op6, op4,
[all …]
H A DARMInstrMVE.td289 def MVE_v8i16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, v4i1, 0b01, "i", ?>;
297 def MVE_v8s16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, v4i1, 0b01, "s", 0b0>;
301 def MVE_v8u16 : MVEVectorVTInfo<v8i16, v4i32, v8i1, v4i1, 0b01, "u", 0b1>;
306 def MVE_v8f16 : MVEVectorVTInfo<v8f16, v4f32, v8i1, v4i1, 0b01, "f", ?>;
477 def MVE_URSHR : MVE_ScalarShiftSRegImm<"urshr", 0b01>;
580 def MVE_LSRL : MVE_ScalarShiftDRegImm<"lsrl", 0b01, ?, [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
590 def MVE_URSHRL : MVE_ScalarShiftDRegImm<"urshrl", 0b01, 0b1>;
670 let Inst{17-16} = 0b01;
769 let Inst{17-16} = 0b01;
833 "$RdaDest = $RdaSrc", !if(sz, 0b01, 0b10), pattern> {
[all …]
H A DARMInstrThumb2.td749 let Inst{26-25} = 0b01;
773 let Inst{26-25} = 0b01;
846 let Inst{26-25} = 0b01;
859 let Inst{26-25} = 0b01;
936 let Inst{25-24} = 0b01;
1002 let Inst{26-25} = 0b01;
1016 let Inst{26-25} = 0b01;
1045 let Inst{26-25} = 0b01;
1058 let Inst{26-25} = 0b01;
1142 let Inst{26-25} = 0b01;
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kInstrFormats.td213 def MxEncEAj_0: MxEncEA<MxBeadReg<0>, MxBead2Bits<0b01>, MxBead1Bit<0>>;
214 def MxEncEAo_0: MxEncEA<MxBeadReg<0>, MxBead2Bits<0b01>, MxBead1Bit<1>>;
225 def MxEncEAj_1: MxEncEA<MxBeadReg<1>, MxBead2Bits<0b01>, MxBead1Bit<0>>;
226 def MxEncEAo_1: MxEncEA<MxBeadReg<1>, MxBead2Bits<0b01>, MxBead1Bit<1>>;
234 def MxEncEAj_2: MxEncEA<MxBeadReg<2>, MxBead2Bits<0b01>, MxBead1Bit<0>>;
235 def MxEncEAo_2: MxEncEA<MxBeadReg<2>, MxBead2Bits<0b01>, MxBead1Bit<1>>;
256 !eq(scale, 2) : 0b01,
460 def MxEncSize16 : MxEncSize<0b01>;
470 def MxNewEncSize16 : MxNewEncSize<0b01>;
H A DM68kInstrShiftRotate.td34 defvar MxROOP_LS = 0b01;
/openbsd-src/gnu/usr.bin/binutils/gdb/testsuite/gdb.disasm/
H A Dt06_ari2.s104 adds.l #1,er1 ;0b01
108 subs.l #1,er1 ;1b01
/openbsd-src/usr.bin/file/magdir/
H A Dfsav18 #>>>>10 byte 0 \b01-
/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/
H A DAVRInstrFormats.td177 // a = regular/postinc/predec (reg = 0b00, postinc = 0b01, predec = 0b10)
227 let Inst{3 - 2} = 0b01;
275 // ff = 0b01 for FMUL
/openbsd-src/gnu/llvm/llvm/lib/Target/ARC/
H A DARCInstrFormats.td82 def ByteSM : DataSizeMode<0b01, "B", "b">;
90 def PreIncAM : AddrMode<0b01, "_AW", ".aw">;
322 let Inst{23-22} = 0b01;
432 let Inst{23-22} = 0b01;

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