| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 962 void addRegOperands(MCInst &Inst, unsigned N) const;
965 addRegOperands(Inst, N); in addBoolRegOperands()
970 addRegOperands(Inst, N); in addRegOrImmOperands()
981 addRegOperands(Inst, N); in addRegOrImmWithInputModsOperands()
1001 addRegOperands(Inst, N); in addRegWithInputModsOperands()
2306 void AMDGPUOperand::addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in AMDGPUOperand
6393 Op.addRegOperands(Inst, 1); in cvtDSOffset01()
6427 Op.addRegOperands(Inst, 1); in cvtDSImpl()
6465 Op.addRegOperands(Inst, 1); in cvtExp()
7750 Op.addRegOperands(Inst, 1); in cvtMubufImpl()
[all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.td | 188 let RenderMethod = "addRegOperands";
661 let RenderMethod = "addRegOperands";
710 let RenderMethod = "addRegOperands", ParserMethod="tryParseGPRSeqPair" in {
761 let RenderMethod = "addRegOperands";
908 let RenderMethod = "addRegOperands";
1069 let RenderMethod = "addRegOperands";
1411 let RenderMethod = "addRegOperands";
1469 let RenderMethod = "addRegOperands";
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/AsmParser/ |
| H A D | M68kAsmParser.cpp | 162 void addRegOperands(MCInst &Inst, unsigned N) const;
309 void M68kOperand::addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in M68kOperand
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| /openbsd-src/gnu/llvm/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 190 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoD.td | 37 let RenderMethod = "addRegOperands";
43 let RenderMethod = "addRegOperands";
|
| H A D | RISCVInstrInfoF.td | 76 let RenderMethod = "addRegOperands";
|
| H A D | RISCVInstrInfoV.td | 46 let RenderMethod = "addRegOperands";
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/AsmParser/ |
| H A D | XtensaAsmParser.cpp | 323 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 128 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anone9cbbf050111::MSP430Operand
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 299 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon21cc4c950111::SystemZOperand
1324 ZOperand.addRegOperands(Inst, 1); in ParseDirectiveInsn()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 136 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anond633fba90111::AVROperand
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 535 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.td | 41 let RenderMethod = "addRegOperands";
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 377 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
410 addRegOperands(Inst, N); in addsgp10ConstOperands()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmParser.cpp | 118 void addRegOperands(MCInst &, unsigned) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 404 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 96 let RenderMethod = "addRegOperands";
108 let RenderMethod = "addRegOperands";
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 380 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon4ad277090211::SparcOperand
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 501 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon51359f510111::LoongArchOperand
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 561 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 466 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon0d4fa8ad0211::VEOperand
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.td | 181 let RenderMethod = "addRegOperands", SuperClasses = [MxRegClass]in {
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 450 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2551 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function in __anon3b5979970111::ARMOperand
5758 ((ARMOperand &)*Operands[3]).addRegOperands(Inst, 1); in cvtThumbMultiply()
5767 ((ARMOperand &)*Operands[RegOp]).addRegOperands(Inst, 1); in cvtThumbMultiply()
5836 ((ARMOperand &)*Operands[2]).addRegOperands(Inst, 1); // Rt in cvtMVEVMOVQtoDReg()
5837 ((ARMOperand &)*Operands[3]).addRegOperands(Inst, 1); // Rt2 in cvtMVEVMOVQtoDReg()
5838 ((ARMOperand &)*Operands[4]).addRegOperands(Inst, 1); // Qd in cvtMVEVMOVQtoDReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 903 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() function
|