Home
last modified time | relevance | path

Searched refs:addOperand (Results 1 – 25 of 207) sorted by relevance

123456789

/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp563 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF()
569 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF()
580 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6()
582 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATIMMR6()
584 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6()
594 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI()
596 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR64RegClassID, in DecodeDAHIDATI()
598 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATI()
632 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch()
635 MI.addOperand(MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, in DecodeAddiGroupBranch()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp456 Inst.addOperand(MCOperand::createReg(RRegs[getReg()])); in addRegGPRCOperands()
461 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands()
466 Inst.addOperand(MCOperand::createReg(XRegs[getReg()])); in addRegG8RCOperands()
471 Inst.addOperand(MCOperand::createReg(XRegsNoX0[getReg()])); in addRegG8RCNoX0Operands()
476 Inst.addOperand(MCOperand::createReg(XRegs[getG8pReg()])); in addRegG8pRCOperands()
495 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF4RCOperands()
500 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF8RCOperands()
505 Inst.addOperand(MCOperand::createReg(VFRegs[getReg()])); in addRegVFRCOperands()
510 Inst.addOperand(MCOperand::createReg(VRegs[getReg()])); in addRegVRRCOperands()
515 Inst.addOperand(MCOperand::createReg(VSRegs[getVSReg()])); in addRegVSRCOperands()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.cpp80 .addOperand(MI.getOperand(0)) in expandJBTF()
87 .addOperand(MI.getOperand(1)) in expandJBTF()
88 .addOperand(MI.getOperand(2)); in expandJBTF()
90 TmpInst = MCInstBuilder(CSKY::JMPI32).addOperand(MI.getOperand(2)); in expandJBTF()
105 .addOperand(MI.getOperand(0)) in expandNEG()
106 .addOperand(MI.getOperand(1)); in expandNEG()
111 .addOperand(MI.getOperand(0)) in expandNEG()
112 .addOperand(MI.getOperand(0)) in expandNEG()
127 .addOperand(MI.getOperand(0)) in expandRSUBI()
128 .addOperand(MI.getOperand(1)); in expandRSUBI()
[all …]
H A DCSKYAsmBackend.cpp302 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
303 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
307 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
311 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
315 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
320 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
321 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
322 Res.addOperand(Inst.getOperand(2)); in relaxInstruction()
326 Res.addOperand(Inst.getOperand(0)); in relaxInstruction()
327 Res.addOperand(Inst.getOperand(1)); in relaxInstruction()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp300 ITInst.addOperand(MCOperand::createImm(ITState.Cond)); in flushPendingInstructions()
301 ITInst.addOperand(MCOperand::createImm(ITState.Mask)); in flushPendingInstructions()
2466 Inst.addOperand(MCOperand::createImm(0)); in addExpr()
2468 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr()
2470 Inst.addOperand(MCOperand::createExpr(Expr)); in addExpr()
2485 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); in addCondCodeOperands()
2487 Inst.addOperand(MCOperand::createReg(RegNum)); in addCondCodeOperands()
2492 Inst.addOperand(MCOperand::createImm(unsigned(getVPTPred()))); in addVPTPredNOperands()
2494 Inst.addOperand(MCOperand::createReg(RegNum)); in addVPTPredNOperands()
2495 Inst.addOperand(MCOperand::createReg(0)); in addVPTPredNOperands()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCompound.cpp216 CompoundInsn->addOperand(Rt); in getCompoundInsn()
217 CompoundInsn->addOperand(L.getOperand(1)); // Immediate in getCompoundInsn()
218 CompoundInsn->addOperand(R.getOperand(0)); // Jump target in getCompoundInsn()
228 CompoundInsn->addOperand(Rt); in getCompoundInsn()
229 CompoundInsn->addOperand(Rs); in getCompoundInsn()
230 CompoundInsn->addOperand(R.getOperand(0)); // Jump target. in getCompoundInsn()
242 CompoundInsn->addOperand(Rs); in getCompoundInsn()
243 CompoundInsn->addOperand(Rt); in getCompoundInsn()
244 CompoundInsn->addOperand(R.getOperand(1)); in getCompoundInsn()
255 CompoundInsn->addOperand(Rs); in getCompoundInsn()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp74 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR8RegisterClass()
85 Inst.addOperand(MCOperand::createReg(Register)); in DecodeLD8RegisterClass()
141 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr()
157 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA()
165 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT()
166 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT()
175 Inst.addOperand(MCOperand::createImm(Field << 1)); in decodeCallTarget()
192 Inst.addOperand(MCOperand::createReg(AVR::R31R30)); in decodeFLPMX()
236 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK()
263 Inst.addOperand( in decodeMemri()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp252 T.addOperand(Inst.getOperand(i)); in ScaleVectorOffset()
260 T.addOperand(MCOperand::createExpr(NewHE)); in ScaleVectorOffset()
284 Inst.addOperand(Reg); in HexagonProcessInstruction()
285 Inst.addOperand(MCOperand::createReg(Hexagon::R0)); in HexagonProcessInstruction()
286 Inst.addOperand(S16); in HexagonProcessInstruction()
293 Inst.addOperand(MCOperand::createExpr(Zero)); in HexagonProcessInstruction()
300 Inst.addOperand(MCOperand::createExpr(Zero)); in HexagonProcessInstruction()
307 Inst.addOperand(MCOperand::createExpr(Zero)); in HexagonProcessInstruction()
314 Inst.addOperand(MCOperand::createExpr(Zero)); in HexagonProcessInstruction()
321 Inst.addOperand(MCOperand::createExpr(C255)); in HexagonProcessInstruction()
[all …]
/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCInstBuilder.h32 Inst.addOperand(MCOperand::createReg(Reg)); in addReg()
38 Inst.addOperand(MCOperand::createImm(Val)); in addImm()
44 Inst.addOperand(MCOperand::createSFPImm(Val)); in addSFPImm()
50 Inst.addOperand(MCOperand::createDFPImm(Val)); in addDFPImm()
56 Inst.addOperand(MCOperand::createExpr(Val)); in addExpr()
62 Inst.addOperand(MCOperand::createInst(Val)); in addInst()
67 MCInstBuilder &addOperand(const MCOperand &Op) { in addOperand() function
68 Inst.addOperand(Op); in addOperand()
/openbsd-src/gnu/llvm/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp74 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeARRegisterClass()
89 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeSRRegisterClass()
109 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Imm << 2))); in decodeCallOperand()
116 Inst.addOperand(MCOperand::createImm(SignExtend64<18>(Imm))); in decodeJumpOperand()
130 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeBranchOperand()
136 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeBranchOperand()
145 Inst.addOperand(MCOperand::createImm( in decodeL32ROperand()
153 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeImm8Operand()
161 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 8))); in decodeImm8_sh8Operand()
168 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeImm12Operand()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget()
76 Inst.addOperand(MCOperand::createImm(Offset)); in decodeDirectBrTarget()
87 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
243 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
252 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
261 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand()
270 Inst.addOperand(MCOperand::createReg(VSRpRegs[RegNo >> 1])); in decodeVSRpEvenOperands()
294 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
305 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
306 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp89 SICInst.addOperand(RD); in emitSIC()
97 BSICInst.addOperand(R1); in emitBSIC()
98 BSICInst.addOperand(R2); in emitBSIC()
100 BSICInst.addOperand(czero); in emitBSIC()
101 BSICInst.addOperand(czero); in emitBSIC()
109 LEAInst.addOperand(RD); in emitLEAzzi()
111 LEAInst.addOperand(CZero); in emitLEAzzi()
112 LEAInst.addOperand(CZero); in emitLEAzzi()
113 LEAInst.addOperand(Imm); in emitLEAzzi()
121 LEASLInst.addOperand(RD); in emitLEASLzzi()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp87 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
173 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
181 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
266 Inst.addOperand(MCOperand::createImm(Value)); in decodePCDBLOperand()
306 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr12Operand()
307 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
316 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr20Operand()
317 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
327 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr12Operand()
328 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp366 MI.addOperand(Imm4Op); in getInstruction()
425 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR128RegisterClass()
445 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR64RegisterClass()
457 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR32RegisterClass()
469 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR16RegisterClass()
481 Inst.addOperand(MCOperand::createReg(Register)); in DecodeFPR8RegisterClass()
494 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64commonRegisterClass()
506 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64RegisterClass()
521 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64x8ClassRegisterClass()
532 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPR64spRegisterClass()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp114 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodeGPRRegisterClass()
124 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); in DecodeFPR32RegisterClass()
134 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); in DecodesFPR32RegisterClass()
144 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); in DecodesFPR64RegisterClass()
154 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); in DecodesFPR64_VRegisterClass()
164 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); in DecodeFPR64RegisterClass()
176 Inst.addOperand(MCOperand::createReg(FPR128DecoderTable[RegNo])); in DecodesFPR128RegisterClass()
186 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodesGPRRegisterClass()
196 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodemGPRRegisterClass()
208 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); in DecodeGPRSPRegisterClass()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust()
170 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
180 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRiMemoryValue()
182 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
193 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
195 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
206 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeSplsValue()
208 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
225 MI.addOperand(MCOperand::createImm(Insn)); in decodeBranch()
233 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp38 NopInst.addOperand(MCOperand::createImm(0)); in getNop()
39 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
40 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
43 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop()
44 NopInst.addOperand(MCOperand::createReg(ARM::R0)); in getNop()
45 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
46 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
47 NopInst.addOperand(MCOperand::createReg(0)); in getNop()
/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp72 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass()
83 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR16RegisterClass()
94 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass()
105 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass()
116 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass()
127 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64CRegisterClass()
158 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRCRegisterClass()
169 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRPF64RegisterClass()
180 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVRRegisterClass()
200 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeVRM2RegisterClass()
[all …]
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h101 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
132 MI->addOperand(*MF, MachineOperand::CreateImm(Val)); in addImm()
137 MI->addOperand(*MF, MachineOperand::CreateCImm(Val)); in addCImm()
142 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val)); in addFPImm()
148 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
153 MI->addOperand(*MF, MachineOperand::CreateFI(Idx)); in addFrameIndex()
160 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
166 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
173 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
180 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVAsmPrinter.cpp141 LabelInst.addOperand(MCOperand::createReg(MAI->getOrCreateMBBRegister(MBB))); in emitOpLabel()
259 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang))); in outputDebugSourceAndStrings()
260 Inst.addOperand( in outputDebugSourceAndStrings()
271 Inst.addOperand(MCOperand::createReg(Reg)); in outputOpExtInstImports()
282 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr))); in outputOpMemoryModel()
283 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem))); in outputOpMemoryModel()
317 TmpInst.addOperand(MCOperand::createReg(Reg)); in outputEntryPoints()
331 Inst.addOperand(MCOperand::createImm(Cap)); in outputGlobalRequirements()
395 Inst.addOperand(MCOperand::createImm(Const->getZExtValue())); in addOpsFromMDNode()
399 Inst.addOperand(MCOperand::createReg(FuncReg)); in addOpsFromMDNode()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1300 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPRRegisterClass()
1314 Inst.addOperand(MCOperand::createReg(Register)); in DecodeCLRMGPRRegisterClass()
1351 Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV)); in DecodeGPRwithAPSRRegisterClass()
1366 Inst.addOperand(MCOperand::createReg(ARM::ZR)); in DecodeGPRwithZRRegisterClass()
1414 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeGPRPairRegisterClass()
1425 Inst.addOperand(MCOperand::createReg(RegisterPair)); in DecodeGPRPairnospRegisterClass()
1439 Inst.addOperand(MCOperand::createReg(Register)); in DecodeGPRspRegisterClass()
1470 Inst.addOperand(MCOperand::createReg(Register)); in DecodetcGPRRegisterClass()
1507 Inst.addOperand(MCOperand::createReg(Register)); in DecodeSPRRegisterClass()
1540 Inst.addOperand(MCOperand::createReg(Register)); in DecodeDPRRegisterClass()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp63 Inst.addOperand(MCOperand::createReg(LoongArch::R0 + RegNo)); in DecodeGPRRegisterClass()
72 Inst.addOperand(MCOperand::createReg(LoongArch::F0 + RegNo)); in DecodeFPR32RegisterClass()
81 Inst.addOperand(MCOperand::createReg(LoongArch::F0_64 + RegNo)); in DecodeFPR64RegisterClass()
90 Inst.addOperand(MCOperand::createReg(LoongArch::FCC0 + RegNo)); in DecodeCFRRegisterClass()
99 Inst.addOperand(MCOperand::createReg(LoongArch::FCSR0 + RegNo)); in DecodeFCSRRegisterClass()
108 Inst.addOperand(MCOperand::createImm(Imm + P)); in decodeUImmOperand()
119 Inst.addOperand(MCOperand::createImm(SignExtend64<N + S>(Imm << S))); in decodeSImmOperand()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp379 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
384 Inst.addOperand(MCOperand::createExpr(getImm())); in addImmOperands()
393 Inst.addOperand(MCOperand::createExpr(Expr)); in addSignedImmOperands()
403 Inst.addOperand(MCOperand::createExpr(NewExpr)); in addSignedImmOperands()
541 NewInst.addOperand(MCOperand::createExpr(HexagonMCExpr::create( in canonicalizeImmediates()
547 NewInst.addOperand(I); in canonicalizeImmediates()
618 MCB.addOperand(MCOperand::createImm(0)); in MatchAndEmitInstruction()
651 MCB.addOperand(MCOperand::createInst(SubInst)); in MatchAndEmitInstruction()
1237 TmpInst.addOperand(Rdd); in makeCombineInst()
1238 TmpInst.addOperand(MO1); in makeCombineInst()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp140 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass()
175 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9()
193 Inst.addOperand(MCOperand::createImm(Offset)); in DecodeSymbolicOperandOff()
212 Inst.addOperand(MCOperand::createImm( in DecodeSignedOperand()
224 Inst.addOperand( in DecodeFromCyclicRange()
241 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeStLImmInstruction()
242 Inst.addOperand(MCOperand::createImm(0)); in DecodeStLImmInstruction()
259 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeLdLImmInstruction()
260 Inst.addOperand(MCOperand::createImm(0)); in DecodeLdLImmInstruction()
277 Inst.addOperand(MCOperand::createImm((uint32_t)(Insn >> 32))); in DecodeLdRLImmInstruction()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h530 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr()
532 Inst.addOperand(MCOperand::createExpr(Expr)); in addExpr()
537 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands()
545 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR32orGR64Operands()
554 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR16orGR32orGR64Operands()
588 Inst.addOperand(MCOperand::createReg(Reg)); in addMaskPairOperands()
594 Inst.addOperand(MCOperand::createReg(getMemBaseReg())); in addMemOperands()
596 Inst.addOperand(MCOperand::createReg(getMemDefaultBaseReg())); in addMemOperands()
597 Inst.addOperand(MCOperand::createImm(getMemScale())); in addMemOperands()
598 Inst.addOperand(MCOperand::createReg(getMemIndexReg())); in addMemOperands()
[all …]

123456789