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Searched refs:addDef (Results 1 – 25 of 57) sorted by relevance

123

/openbsd-src/gnu/llvm/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp77 .addDef(createTypeVReg(MIRBuilder)); in getOpTypeBool()
84 .addDef(createTypeVReg(MIRBuilder)) in getOpTypeInt()
93 .addDef(createTypeVReg(MIRBuilder)) in getOpTypeFloat()
100 .addDef(createTypeVReg(MIRBuilder)); in getOpTypeVoid()
112 .addDef(createTypeVReg(MIRBuilder)) in getOpTypeVector()
163 .addDef(Res) in getOrCreateConstInt()
168 .addDef(Res) in getOrCreateConstInt()
205 .addDef(Res) in buildConstantInt()
211 .addDef(Res) in buildConstantInt()
271 .addDef(SpvVecConst) in getOrCreateIntCompositeOrNull()
[all …]
H A DSPIRVInstructionSelector.cpp288 .addDef(ResVReg) in spvSelect()
448 .addDef(ResVReg) in spvSelect()
518 .addDef(ResVReg) in selectExtInst()
537 .addDef(ResVReg) in selectUnOpWithSrc()
597 .addDef(ResVReg) in selectLoad()
650 .addDef(VarReg) in selectMemOperation()
691 .addDef(ResVReg) in selectAtomicRMW()
749 .addDef(ACmpRes) in selectAtomicCmpXchg()
761 .addDef(CmpSuccReg) in selectAtomicCmpXchg()
768 .addDef(TmpReg) in selectAtomicCmpXchg()
[all …]
H A DSPIRVBuiltins.cpp487 .addDef(Call->ReturnRegister) in buildAtomicLoadInst()
598 .addDef(Tmp) in buildAtomicCompareExchangeInst()
642 .addDef(Call->ReturnRegister) in buildAtomicRMWInst()
685 MIB.addDef(Call->ReturnRegister) in buildAtomicFlagInst()
795 .addDef(Call->ReturnRegister) in generateExtInst()
820 .addDef(CompareRegister) in generateRelationalInst()
871 .addDef(GroupResultRegister) in generateGroupInst()
1087 .addDef(Call->ReturnRegister) in generateDotOrFMulInst()
1137 .addDef(QueryResult) in generateImageSizeQueryInst()
1151 .addDef(Call->ReturnRegister) in generateImageSizeQueryInst()
[all …]
H A DSPIRVCallLowering.cpp317 .addDef(FuncVReg) in lowerFormalArguments()
328 .addDef(VRegs[i][0]) in lowerFormalArguments()
430 .addDef(ResVReg) in lowerCall()
H A DSPIRVPreLegalizer.cpp215 .addDef(Reg) in insertAssignInstr()
346 MIB.buildInstr(IdOpInfo.second).addDef(IdOpInfo.first).addUse(Op.getReg()); in processInstr()
H A DSPIRVLegalizerInfo.cpp284 .addDef(ConvReg) in convertPtrToInt()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp276 .addDef(Dest) in buildUnalignedLoad()
326 .addDef(PseudoMULTuReg) in select()
333 .addDef(I.getOperand(0).getReg()) in select()
375 .addDef(JTIndex) in select()
383 .addDef(DestAddress) in select()
392 .addDef(Dest) in select()
404 .addDef(Dest) in select()
482 .addDef(ImplDef); in select()
519 .addDef(HILOReg) in select()
527 .addDef(I.getOperand(0).getReg()) in select()
[all …]
H A DMipsISelLowering.cpp4789 .addDef(Temp) in emitLDR_W()
4792 BuildMI(*BB, I, DL, TII->get(Mips::FILL_W)).addDef(Dest).addUse(Temp); in emitLDR_W()
4799 BuildMI(*BB, I, DL, TII->get(Mips::IMPLICIT_DEF)).addDef(Undef); in emitLDR_W()
4801 .addDef(LoadHalf) in emitLDR_W()
4806 .addDef(LoadFull) in emitLDR_W()
4810 BuildMI(*BB, I, DL, TII->get(Mips::FILL_W)).addDef(Dest).addUse(LoadFull); in emitLDR_W()
4836 .addDef(Temp) in emitLDR_D()
4839 BuildMI(*BB, I, DL, TII->get(Mips::FILL_D)).addDef(Dest).addUse(Temp); in emitLDR_D()
4845 .addDef(Lo) in emitLDR_D()
4849 .addDef(Hi) in emitLDR_D()
[all …]
H A DMipsCallLowering.cpp122 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
479 MIB.addDef(Mips::SP, RegState::Implicit); in lowerCall()
540 MIB.addDef(Mips::GP, RegState::Implicit); in lowerCall()
H A DMipsSEISelDAGToDAG.cpp134 .addDef(Mips::AT_64) in emitMCountABI()
142 .addDef(Mips::AT) in emitMCountABI()
147 .addDef(Mips::SP) in emitMCountABI()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp232 .addDef(MisspeculatingTaintReg) in insertTrackingCode()
370 .addDef(AArch64::XZR) in insertSPToRegTaintPropagation()
376 .addDef(MisspeculatingTaintReg) in insertSPToRegTaintPropagation()
393 .addDef(TmpReg) in insertRegToSPTaintPropagation()
399 .addDef(TmpReg, RegState::Renamable) in insertRegToSPTaintPropagation()
405 .addDef(AArch64::SP) in insertRegToSPTaintPropagation()
453 .addDef(Reg) in makeGPRSpeculationSafe()
577 .addDef(DstReg) in expandSpeculationSafeValue()
H A DAArch64LowerHomogeneousPrologEpilog.cpp212 MIB.addDef(AArch64::SP); in emitStore()
235 MIB.addDef(AArch64::SP); in emitLoad()
313 .addDef(AArch64::FP) in getOrCreateFrameHelper()
328 .addDef(AArch64::X16) in getOrCreateFrameHelper()
557 .addDef(AArch64::FP) in lowerProlog()
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp795 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu).addUse(VMZu); in expandPseudoLogM()
796 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl).addUse(VMZl); in expandPseudoLogM()
800 BuildMI(*MBB, MI, DL, MCID).addDef(VMXu).addUse(VMYu); in expandPseudoLogM()
801 BuildMI(*MBB, MI, DL, MCID).addDef(VMXl).addUse(VMYl); in expandPseudoLogM()
930 .addDef(VMX) in expandPostRAPseudo()
936 .addDef(VMX) in expandPostRAPseudo()
944 .addDef(VMX) in expandPostRAPseudo()
953 .addDef(VMX) in expandPostRAPseudo()
1104 .addDef(MI.getOperand(0).getReg()) in expandGetStackTopPseudo()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp495 .addDef(DestReg) in putConstant()
599 .addDef(ResReg) in insertComparison()
696 .addDef(ResultReg) in selectGlobal()
793 .addDef(ResReg) in selectSelect()
887 .addDef(SExtResult) in select()
936 .addDef(DstReg) in select()
937 .addDef(IgnoredBits) in select()
H A DARMLowOverheadLoops.cpp1485 MIB.addDef(ARM::LR); in RevertLoopEndDec()
1571 MIB.addDef(ARM::LR); in ExpandLoopStart()
1731 MIB.addDef(ARM::LR); in Expand()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp302 .addDef(getMRI()->createGenericVirtualRegister(EltTy)) in buildConstant()
335 .addDef(getMRI()->createGenericVirtualRegister(EltTy)) in buildFConstant()
768 MIB.addDef(ResultReg); in buildIntrinsic()
851 .addDef(OldValRes) in buildAtomicCmpXchgWithSuccess()
852 .addDef(SuccessRes) in buildAtomicCmpXchgWithSuccess()
877 .addDef(OldValRes) in buildAtomicCmpXchg()
1018 return buildInstr(TargetOpcode::G_BLOCK_ADDR).addDef(Res).addBlockAddress(BA); in buildBlockAddress()
H A DRegBankSelect.cpp163 .addDef(Dst) in repairReg()
193 .addDef(MO.getReg()); in repairReg()
203 UnMergeBuilder.addDef(DefReg); in repairReg()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86CallLowering.cpp243 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
364 .addDef(X86::AL) in lowerCall()
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp165 MIB.addDef(PhysReg, RegState::Implicit); in assignValueToReg()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp657 .addDef(LoLHS) in split64BitValueForMapping()
658 .addDef(HiLHS) in split64BitValueForMapping()
791 .addDef(InitSaveExecReg); in executeInWaterfallLoop()
823 .addDef(PhiExec) in executeInWaterfallLoop()
932 .addDef(NewExec) in executeInWaterfallLoop()
941 .addDef(ExecReg) in executeInWaterfallLoop()
958 .addDef(ExecReg) in executeInWaterfallLoop()
1412 .addDef(LoadParts[i]) // vdata in applyMappingSBufferLoad()
1856 .addDef(DstReg) in buildVCopy()
1866 .addDef(TmpReg0) in buildVCopy()
[all …]
H A DAMDGPUInstructionSelector.cpp343 .addDef(UnusedCarry, RegState::Dead) in selectG_ADD_SUB()
377 .addDef(CarryReg) in selectG_ADD_SUB()
382 .addDef(MRI->createVirtualRegister(CarryRC), RegState::Dead) in selectG_ADD_SUB()
1043 .addDef(Dst1) in selectDivScale()
1914 MIB.addDef(TmpReg); in selectImageIntrinsic()
1921 MIB.addDef(VDataOut); // vdata output in selectImageIntrinsic()
2019 .addDef(Dst1) in selectDSBvhStackIntrinsic()
4503 .addDef(RSrc2) in buildRSRC()
4506 .addDef(RSrc3) in buildRSRC()
4513 .addDef(RSrcHi) in buildRSRC()
[all …]
H A DSIShrinkInstructions.cpp716 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
717 .addDef(Y1.Reg, 0, Y1.SubReg) in matchSwap()
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp798 .addDef(Hexagon::D15) in insertEpilogueInBlock()
848 .addDef(Hexagon::D15) in insertEpilogueInBlock()
854 .addDef(Hexagon::D15) in insertEpilogueInBlock()
875 .addDef(Hexagon::D15) in insertEpilogueInBlock()
906 .addDef(SP) in insertAllocframe()
918 .addDef(SP) in insertAllocframe()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h85 MIB.addDef(Reg); in addDefToMIB()
88 MIB.addDef(MRI.createGenericVirtualRegister(LLTTy)); in addDefToMIB()
91 MIB.addDef(MRI.createVirtualRegister(RC)); in addDefToMIB()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DLiveDebugVariables.cpp413 void addDef(SlotIndex Idx, ArrayRef<MachineOperand> LocMOs, bool IsIndirect, in addDef() function in __anon5b3cf91b0411::UserValue
859 UV->addDef(Idx, in handleDebugValue()
870 UV->addDef(Idx, UndefMOs, false, IsList, *Expr); in handleDebugValue()

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