Searched refs:XVT (Results 1 – 7 of 7) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 803 bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument 806 if (XVT.isVector()) in shouldTransformSignedTruncationCheck() 817 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1130 shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument 1133 if (XVT.isVector()) in shouldTransformSignedTruncationCheck() 1144 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
|
| H A D | X86ISelDAGToDAG.cpp | 3735 MVT XVT = X.getSimpleValueType(); in matchBitExtract() local 3771 if (XVT != MVT::i32) { in matchBitExtract() 3772 Control = CurDAG->getNode(ISD::ANY_EXTEND, DL, XVT, Control); in matchBitExtract() 3777 SDValue Extract = CurDAG->getNode(X86ISD::BEXTR, DL, XVT, X, Control); in matchBitExtract() 3780 if (XVT != NVT) { in matchBitExtract()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 3840 EVT XVT = X.getValueType(); in optimizeSetCCOfSignedTruncationCheck() local 3875 assert(XVT.isInteger()); in optimizeSetCCOfSignedTruncationCheck() 3876 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck() 3889 assert(KeptBits > 0 && KeptBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck() 3894 XVT, KeptBits)) in optimizeSetCCOfSignedTruncationCheck() 3897 const unsigned MaskedBits = XVT.getSizeInBits() - KeptBits; in optimizeSetCCOfSignedTruncationCheck() 3898 assert(MaskedBits > 0 && MaskedBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck() 3902 SDValue ShiftAmt = DAG.getConstant(MaskedBits, DL, XVT); in optimizeSetCCOfSignedTruncationCheck() 3903 SDValue T0 = DAG.getNode(ISD::SHL, DL, XVT, X, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck() 3904 SDValue T1 = DAG.getNode(ISD::SRA, DL, XVT, T0, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
|
| H A D | DAGCombiner.cpp | 5329 EVT XVT = X.getValueType(); in hoistLogicOpWithSameOpcodeHands() local 5338 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands() 5343 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands() 5348 !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands() 5351 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands() 5362 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands() 5365 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands() 5369 if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT)) in hoistLogicOpWithSameOpcodeHands() 5371 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands() 5373 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands() [all …]
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 744 virtual bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3201 EVT XVT = X.getValueType(); in performShlCombine() local 3202 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0)); in performShlCombine()
|