| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | CGCall.h | 263 struct Writeback { struct
305 Writeback writeback = {srcLV, temporary, toUse}; in addWriteback()
311 typedef llvm::iterator_range<SmallVectorImpl<Writeback>::const_iterator>
339 SmallVector<Writeback, 1> Writebacks;
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| H A D | CGCall.cpp | 3876 const CallArgList::Writeback &writeback) { in emitWriteback()
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| /openbsd-src/gnu/llvm/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.cpp | 876 bool Writeback = (OC[Offset + 1] & 0x20) == 0x20; in opcode_save_any_reg() local
889 if (Writeback) in opcode_save_any_reg()
891 if (!Writeback && !Paired && RegKind != 2) in opcode_save_any_reg()
937 if (Writeback) { in opcode_save_any_reg()
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| /openbsd-src/gnu/llvm/llvm/lib/MC/ |
| H A D | MCWin64EH.cpp | 618 int Writeback = Op / 6; in ARM64EmitUnwindCode() local
622 if (Writeback || Paired || Mode == 2) in ARM64EmitUnwindCode()
624 if (Writeback) in ARM64EmitUnwindCode()
629 b = inst.Register | (Writeback << 5) | (Paired << 6); in ARM64EmitUnwindCode()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 642 bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback. in CreateLoadStoreMulti() local
650 Writeback = false; in CreateLoadStoreMulti()
688 Writeback = false; in CreateLoadStoreMulti()
795 if (isThumb1 && !SafeToClobberCPSR && Writeback && !BaseKill) in CreateLoadStoreMulti()
800 if (Writeback) { in CreateLoadStoreMulti()
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| H A D | ARMInstrVFP.td | 244 let Inst{21} = 1; // Writeback
253 let Inst{21} = 1; // Writeback
276 let Inst{21} = 1; // Writeback
289 let Inst{21} = 1; // Writeback
377 let Inst{21} = 1; // Writeback
384 let Inst{21} = 1; // Writeback
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| H A D | ARMInstrThumb.td | 834 // Writeback version is just a pseudo, as there's no encoding difference.
835 // Writeback happens iff the base register is not in the destination register
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| H A D | ARMInstrThumb2.td | 1999 let Inst{21} = 1; // Writeback
2029 let Inst{21} = 1; // Writeback
2071 let Inst{21} = 1; // Writeback
2107 let Inst{21} = 1; // Writeback
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| H A D | ARMInstrInfo.td | 3477 let Inst{21} = 1; // Writeback
3497 let Inst{21} = 1; // Writeback
3517 let Inst{21} = 1; // Writeback
3537 let Inst{21} = 1; // Writeback
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 233 bool Writeback = true; in printInst() local
237 Writeback = false; in printInst()
245 if (Writeback) in printInst()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 227 bool parseDirectiveSEHSaveAnyReg(SMLoc L, bool Paired, bool Writeback);
7495 bool Writeback) { in parseDirectiveSEHSaveAnyReg() argument
7505 if (Offset < 0 || Offset % (Paired || Writeback ? 16 : 8)) in parseDirectiveSEHSaveAnyReg()
7517 if (Writeback) in parseDirectiveSEHSaveAnyReg()
7522 if (Writeback) in parseDirectiveSEHSaveAnyReg()
7529 if (Offset < 0 || Offset % (Paired || Writeback ? 16 : 8)) in parseDirectiveSEHSaveAnyReg()
7534 if (Writeback) in parseDirectiveSEHSaveAnyReg()
7539 if (Writeback) in parseDirectiveSEHSaveAnyReg()
7551 if (Writeback) in parseDirectiveSEHSaveAnyReg()
7556 if (Writeback) in parseDirectiveSEHSaveAnyReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 653 template <bool Writeback>
6674 template <bool Writeback>
6705 if (Writeback) { in DecodeVSTRVLDR_SYSREG()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 664 bool Load, bool ARMMode, bool Writeback);
7572 bool Load, bool ARMMode, bool Writeback) { in validateLDRDSTRD() argument
7573 unsigned RtIndex = Load || !Writeback ? 0 : 1; in validateLDRDSTRD()
7608 if (Writeback) { in validateLDRDSTRD()
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| /openbsd-src/gnu/gcc/gcc/config/m32r/ |
| H A D | m32r.md | 109 ;; and MEM2, and "EXEC" for E, E1, E2, EM, and EA. Writeback and
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| /openbsd-src/gnu/llvm/clang/include/clang/Basic/ |
| H A D | arm_mve.td | 313 // Writeback without predication
|