| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 5138 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), LdVT); in WidenVecRes_LOAD() local 5140 WideVT.getVectorElementCount()); in WidenVecRes_LOAD() 5141 if (ExtType == ISD::NON_EXTLOAD && WideVT.isScalableVector() && in WidenVecRes_LOAD() 5142 TLI.isOperationLegalOrCustom(ISD::VP_LOAD, WideVT) && in WidenVecRes_LOAD() 5152 DAG.getLoadVP(WideVT, DL, LD->getChain(), LD->getBasePtr(), Mask, EVL, in WidenVecRes_LOAD() 5247 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_MGATHER() local 5252 unsigned NumElts = WideVT.getVectorNumElements(); in WidenVecRes_MGATHER() 5258 WideVT.getVectorNumElements()); in WidenVecRes_MGATHER() 5273 SDValue Res = DAG.getMaskedGather(DAG.getVTList(WideVT, MVT::Other), in WidenVecRes_MGATHER() 5284 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_VP_GATHER() local [all …]
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| H A D | LegalizeIntegerTypes.cpp | 1022 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VTSize * 2); in earlyExpandDIVFIX() local 1024 WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT, in earlyExpandDIVFIX() 1027 LHS = DAG.getSExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX() 1028 RHS = DAG.getSExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX() 1030 LHS = DAG.getZExtOrTrunc(LHS, dl, WideVT); in earlyExpandDIVFIX() 1031 RHS = DAG.getZExtOrTrunc(RHS, dl, WideVT); in earlyExpandDIVFIX() 4544 EVT WideVT = in ExpandIntRes_XMULO() local 4546 SDValue LHS = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, N->getOperand(0)); in ExpandIntRes_XMULO() 4547 SDValue RHS = DAG.getNode(ISD::SIGN_EXTEND, dl, WideVT, N->getOperand(1)); in ExpandIntRes_XMULO() 4548 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in ExpandIntRes_XMULO()
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| H A D | TargetLowering.cpp | 9993 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VT.getScalarSizeInBits() * 2); in expandMULO() local 9995 WideVT = in expandMULO() 9996 EVT::getVectorVT(*DAG.getContext(), WideVT, VT.getVectorElementCount()); in expandMULO() 10010 } else if (isTypeLegal(WideVT)) { in expandMULO() 10011 LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS); in expandMULO() 10012 RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS); in expandMULO() 10013 SDValue Mul = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in expandMULO() 10016 getShiftAmountTy(WideVT, DAG.getDataLayout())); in expandMULO() 10018 DAG.getNode(ISD::SRL, dl, WideVT, Mul, ShiftAmt)); in expandMULO() 10028 if (WideVT == MVT::i16) in expandMULO() [all …]
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| H A D | DAGCombiner.cpp | 8220 EVT WideVT = EVT::getIntegerVT(Context, WideNumBits); in mergeTruncStores() local 8221 if (WideVT != MVT::i16 && WideVT != MVT::i32 && WideVT != MVT::i64) in mergeTruncStores() 8263 else if (SourceValue.getValueType() != WideVT) { in mergeTruncStores() 8264 if (WideVal.getValueType() == WideVT || in mergeTruncStores() 8269 if (SourceValue.getScalarValueSizeInBits() < WideVT.getScalarSizeInBits()) in mergeTruncStores() 8299 bool Allowed = TLI.allowsMemoryAccess(Context, Layout, WideVT, in mergeTruncStores() 8333 if (WideVT != SourceValue.getValueType()) { in mergeTruncStores() 8336 SourceValue = DAG.getNode(ISD::TRUNCATE, DL, WideVT, SourceValue); in mergeTruncStores() 8343 SourceValue = DAG.getNode(ISD::BSWAP, DL, WideVT, SourceValue); in mergeTruncStores() 8346 SDValue RotAmt = DAG.getConstant(WideNumBits / 2, DL, WideVT); in mergeTruncStores() [all …]
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| H A D | SelectionDAG.cpp | 11664 EVT WideVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(), in WidenVector() local 11666 return getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, getUNDEF(WideVT), N, in WidenVector()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4187 EVT WideVT = MVT::i32; in lowerATOMIC_LOAD_OP() local 4188 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP() 4214 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP() 4218 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT, in lowerATOMIC_LOAD_OP() 4219 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_LOAD_OP() 4227 Src2 = DAG.getNode(ISD::SHL, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 4228 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP() 4231 Src2 = DAG.getNode(ISD::OR, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 4232 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP() 4235 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 14745 MVT WideVT = WideVec.getSimpleValueType(); in lowerShuffleOfExtractsAsVperm() local 14746 if (!WideVT.is256BitVector()) in lowerShuffleOfExtractsAsVperm() 14771 SDValue Shuf = DAG.getVectorShuffle(WideVT, DL, WideVec, DAG.getUNDEF(WideVT), in lowerShuffleOfExtractsAsVperm() 19429 MVT WideVT = VT; in lower1BitShuffleAsKSHIFTR() local 19431 WideVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in lower1BitShuffleAsKSHIFTR() 19432 SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, in lower1BitShuffleAsKSHIFTR() 19433 DAG.getUNDEF(WideVT), V1, in lower1BitShuffleAsKSHIFTR() 19435 Res = DAG.getNode(X86ISD::KSHIFTR, DL, WideVT, Res, in lower1BitShuffleAsKSHIFTR() 19532 MVT WideVT = VT; in lower1BitShuffle() local 19534 WideVT = Subtarget.hasDQI() ? MVT::v8i1 : MVT::v16i1; in lower1BitShuffle() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7860 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in LowerTRUNCATEVector() local 7876 Op2 = DAG.getUNDEF(WideVT); in LowerTRUNCATEVector() 7894 Op1 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op1); in LowerTRUNCATEVector() 7895 Op2 = DAG.getNode(ISD::BITCAST, DL, WideVT, Op2); in LowerTRUNCATEVector() 7896 return DAG.getVectorShuffle(WideVT, DL, Op1, Op2, ShuffV); in LowerTRUNCATEVector() 8430 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), EltVT, WideNumElts); in widenVec() local 8439 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WideVT, Ops); in widenVec() 8461 EVT WideVT = Wide.getValueType(); in LowerINT_TO_FPVector() local 8462 unsigned WideNumElts = WideVT.getVectorNumElements(); in LowerINT_TO_FPVector() 8479 SignedConv ? DAG.getUNDEF(WideVT) : DAG.getConstant(0, dl, WideVT); in LowerINT_TO_FPVector() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1943 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane() local 1947 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane() 1995 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane() local 1999 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
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| H A D | AArch64ISelLowering.cpp | 12742 EVT WideVT = getPackedSVEVectorVT(InVT.getVectorElementCount()); in LowerINSERT_SUBVECTOR() local 12747 Vec1 = getSVESafeBitCast(WideVT, Vec1, DAG); in LowerINSERT_SUBVECTOR() 12750 Vec1 = DAG.getNode(ISD::ANY_EXTEND, DL, WideVT, Vec1); in LowerINSERT_SUBVECTOR() 12758 SDValue HiVec0 = DAG.getNode(AArch64ISD::UUNPKHI, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR() 12763 SDValue LoVec0 = DAG.getNode(AArch64ISD::UUNPKLO, DL, WideVT, Vec0); in LowerINSERT_SUBVECTOR() 23130 EVT WideVT = VT.widenIntegerVectorElementType(*DAG.getContext()); in LowerFixedLengthVectorIntDivideToSVE() local 23131 if (DAG.getTargetLoweringInfo().isTypeLegal(WideVT)) { in LowerFixedLengthVectorIntDivideToSVE() 23132 SDValue Op0 = DAG.getNode(ExtendOpcode, dl, WideVT, Op.getOperand(0)); in LowerFixedLengthVectorIntDivideToSVE() 23133 SDValue Op1 = DAG.getNode(ExtendOpcode, dl, WideVT, Op.getOperand(1)); in LowerFixedLengthVectorIntDivideToSVE() 23134 SDValue Div = DAG.getNode(Op.getOpcode(), dl, WideVT, Op0, Op1); in LowerFixedLengthVectorIntDivideToSVE()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1832 EVT WideVT = WideVal.getValueType(); in EmitTest() local 1859 if (TLI.isOperationLegal(WideVal.getOpcode(), WideVT)) { in EmitTest()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5213 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerINSERT_VECTOR_ELT() local 5214 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerINSERT_VECTOR_ELT() 5215 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideVT, Vec, Val, Idx); in lowerINSERT_VECTOR_ELT() 5375 MVT WideVT = MVT::getVectorVT(WideEltVT, WidenVecLen); in lowerEXTRACT_VECTOR_ELT() local 5376 Vec = DAG.getNode(ISD::BITCAST, DL, WideVT, Vec); in lowerEXTRACT_VECTOR_ELT() 5387 MVT WideVT = MVT::getVectorVT(MVT::i8, VecVT.getVectorElementCount()); in lowerEXTRACT_VECTOR_ELT() local 5388 Vec = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT, Vec); in lowerEXTRACT_VECTOR_ELT()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3121 EVT WideVT = MVT::i128; in LowerUMULO_SMULO() local 3145 RTLIB::MUL_I128, WideVT, in LowerUMULO_SMULO()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 1628 EVT WideVT = in WidenOrSplitVectorLoad() local 1633 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue, in WidenOrSplitVectorLoad()
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