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Searched refs:Vd (Results 1 – 23 of 23) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMInstrNEON.td264 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
274 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
284 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
295 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
305 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
315 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
325 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
335 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
347 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
357 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
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H A DARMInstrCDE.td299 iname#"\t$coproc, $Vd, $imm", params.Cstr> {
313 bits<5> Vd;
315 let Inst{22} = Vd{0};
316 let Inst{15-12} = Vd{4-1};
323 bits<5> Vd;
325 let Inst{22} = Vd{4};
326 let Inst{15-12} = Vd{3-0};
360 iname#"\t$coproc, $Vd, $Vm, $imm", params.Cstr> {
374 bits<5> Vd;
377 let Inst{15-12} = Vd{4-1};
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H A DARMInstrFormats.td2235 bits<5> Vd;
2239 let Inst{22} = Vd{4};
2240 let Inst{15-12} = Vd{3-0};
2305 bits<5> Vd;
2308 let Inst{15-12} = Vd{3-0};
2309 let Inst{22} = Vd{4};
2331 bits<5> Vd;
2334 let Inst{15-12} = Vd{3-0};
2335 let Inst{22} = Vd{4};
2345 OpcodeStr, Dt, "$Vd, $Vm", "", pattern> {
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H A DARMInstrVFP.td1801 // if dp_operation then UInt(D:Vd) else UInt(Vd:D);
1814 // if dp_operation then UInt(D:Vd) else UInt(Vd:D);
/openbsd-src/gnu/llvm/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyTIL.h378 Variable(const Variable &Vd, SExpr *D) // rewrite constructor in Variable() argument
379 : SExpr(Vd), Name(Vd.Name), Definition(D), Cvdecl(Vd.Cvdecl) { in Variable()
380 Flags = Vd.kind(); in Variable()
666 Function(Variable *Vd, SExpr *Bd) in Function() argument
667 : SExpr(COP_Function), VarDecl(Vd), Body(Bd) { in Function()
668 Vd->setKind(Variable::VK_Fun); in Function()
671 Function(const Function &F, Variable *Vd, SExpr *Bd) // rewrite constructor in Function() argument
672 : SExpr(F), VarDecl(Vd), Body(Bd) { in Function()
673 Vd->setKind(Variable::VK_Fun); in Function()
717 SFunction(Variable *Vd, SExpr *B) in SFunction() argument
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/openbsd-src/gnu/llvm/clang/lib/Analysis/
H A DThreadSafety.cpp262 bool containsMutexDecl(FactManager &FM, const ValueDecl* Vd) const { in containsMutexDecl()
264 return FM[ID].valueDecl() == Vd; in containsMutexDecl()
296 BeforeInfo* insertAttrExprs(const ValueDecl* Vd,
299 BeforeInfo *getBeforeInfoForDecl(const ValueDecl *Vd,
302 void checkBeforeAfter(const ValueDecl* Vd,
1064 BeforeSet::BeforeInfo* BeforeSet::insertAttrExprs(const ValueDecl* Vd, in insertAttrExprs() argument
1071 std::unique_ptr<BeforeInfo> &InfoPtr = BMap[Vd]; in insertAttrExprs()
1077 for (const auto *At : Vd->attrs()) { in insertAttrExprs()
1105 ArgInfo->Vect.push_back(Vd); in insertAttrExprs()
1119 BeforeSet::getBeforeInfoForDecl(const ValueDecl *Vd, in getBeforeInfoForDecl() argument
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/openbsd-src/regress/lib/libcrypto/x509/bettertls/certificates/
H A D3472.crt13 4/Vd/YwziM9YfxEMLT42oX4jYYLCUh+28DVx1l18qKb3YwraJwnWZOL4NQASLCpL
H A D465.key23 Ad7sbzFJLUwvjElgJR/joKv07GpiMNbu8zWK8a0uEK6D/e8MbrBRbdvtaPo/Vd+n
H A D2574.chain20 akwDjrPi+Y6XVka/GBKd/Vd/YeUnYZ32fK5hOnLj8B/J7uawgq/OEA2nzA/fS7Fw
H A D614.chain42 ZOKh581et4v8wuufoWM6ppyu5A7Y6KNVM2+XW0bhqxU1b0r8tupIuwbHJWwdX/Vd
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td1159 : Pat<(VecTy (OpNode (VecTy V128:$Vd), (VecTy V128:$Vn), (VecTy V128:$Vm))),
1160 (INST (VecTy V128:$Vd), (VecTy V128:$Vn), (VecTy V128:$Vm))>;
1231 : Pat<(v4i32 (OpNode (v4i32 V128:$Vd), (v4i32 V128:$Vn), (v4i32 V128:$Vm))),
1232 (INST (v4i32 V128:$Vd), (v4i32 V128:$Vn), (v4i32 V128:$Vm))>;
1235 …: Pat<(v4i32 (OpNode (v4i32 V128:$Vd), (v4i32 V128:$Vn), (v4i32 V128:$Vm), (i64 VectorIndexS_timm:…
1236 (INST (v4i32 V128:$Vd), (v4i32 V128:$Vn), (v4i32 V128:$Vm), (VectorIndexS_timm:$imm))>;
4604 def : InstAlias<"mvn{ $Vd.8b, $Vn.8b|.8b $Vd, $Vn}",
4605 (NOTv8i8 V64:$Vd, V64:$Vn)>;
4606 def : InstAlias<"mvn{ $Vd.16b, $Vn.16b|.16b $Vd, $Vn}",
4607 (NOTv16i8 V128:$Vd, V128:$Vn)>;
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H A DAArch64SchedPredicates.td282 [// MOVI Vd, #0
287 // MOVI Vd, #0, LSL #0
H A DAArch64InstrFormats.td6442 def : InstAlias<asm # "\t$Vd.4h, $Vn.4h, #0",
6443 (!cast<Instruction>(NAME # v4i16rz) V64:$Vd, V64:$Vn), 0>;
6444 def : InstAlias<asm # "\t$Vd.8h, $Vn.8h, #0",
6445 (!cast<Instruction>(NAME # v8i16rz) V128:$Vd, V128:$Vn), 0>;
6447 def : InstAlias<asm # "\t$Vd.2s, $Vn.2s, #0",
6448 (!cast<Instruction>(NAME # v2i32rz) V64:$Vd, V64:$Vn), 0>;
6449 def : InstAlias<asm # "\t$Vd.4s, $Vn.4s, #0",
6450 (!cast<Instruction>(NAME # v4i32rz) V128:$Vd, V128:$Vn), 0>;
6451 def : InstAlias<asm # "\t$Vd.2d, $Vn.2d, #0",
6452 (!cast<Instruction>(NAME # v2i64rz) V128:$Vd, V128:$Vn), 0>;
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H A DAArch64SchedCyclone.td327 // FMOVv2f64ns Vd.2d, #0.0
336 // ORR.16b Vd,Vn,Vn
637 // Vd is read 5 cycles after issuing the vector load.
H A DSVEInstrFormats.td5115 : I<(outs dstOpType:$Vd), (ins PPR3bAny:$Pg, zprty:$Zn),
5116 asm, "\t$Vd, $Pg, $Zn",
5120 bits<5> Vd;
5129 let Inst{4-0} = Vd;
6613 : I<(outs dstRegtype:$Vd), (ins PPR3bAny:$Pg, zprty:$Zn),
6614 asm, "\t$Vd, $Pg, $Zn",
6618 bits<5> Vd;
6627 let Inst{4-0} = Vd;
7949 : I<(outs dstOpType:$Vd), (ins PPR3bAny:$Pg, zprty:$Zn),
7950 asm, "\t$Vd, $Pg, $Zn",
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp858 MaskT Vd(Len); in vpack() local
863 Vd[i * Size + b] = Vv[(2 * i + Odd) * Size + b]; in vpack()
864 Vd[i * Size + b + Len / 2] = Vu[(2 * i + Odd) * Size + b]; in vpack()
868 return Vd; in vpack()
873 MaskT Vd(Len); in vshuff() local
877 Vd[(2 * i + 0) * Size + b] = Vv[(2 * i + Odd) * Size + b]; in vshuff()
878 Vd[(2 * i + 1) * Size + b] = Vu[(2 * i + Odd) * Size + b]; in vshuff()
881 return Vd; in vshuff()
892 MaskT Vd(Len); in vdealb4w() local
894 Vd[0 * (Len / 4) + i] = Vv[4 * i + 0]; in vdealb4w()
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H A DHexagonPseudo.td432 class Vsplatr_template : InstHexagon<(outs HvxVR:$Vd), (ins IntRegs:$Rs),
440 class Vsplati_template : InstHexagon<(outs HvxVR:$Vd), (ins s32_0Imm:$Val),
506 def PS_vdd0: InstHexagon<(outs HvxWR:$Vd), (ins), "", [], "",
H A DHexagonInstrInfo.cpp1276 Register Vd = MI.getOperand(0).getReg(); in expandPostRAPseudo() local
1277 BuildMI(MBB, MI, DL, get(Hexagon::V6_vsubw_dv), Vd) in expandPostRAPseudo()
1278 .addReg(Vd, RegState::Undef) in expandPostRAPseudo()
1279 .addReg(Vd, RegState::Undef); in expandPostRAPseudo()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1786 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeSPRRegListOperand() local
1790 if (regs == 0 || (Vd + regs) > 32) { in DecodeSPRRegListOperand()
1791 regs = Vd + regs > 32 ? 32 - Vd : regs; in DecodeSPRRegListOperand()
1796 if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeSPRRegListOperand()
1799 if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder))) in DecodeSPRRegListOperand()
1811 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeDPRRegListOperand() local
1815 if (regs == 0 || regs > 16 || (Vd + regs) > 32) { in DecodeDPRRegListOperand()
1816 regs = Vd + regs > 32 ? 32 - Vd : regs; in DecodeDPRRegListOperand()
1822 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeDPRRegListOperand()
1825 if (!Check(S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder))) in DecodeDPRRegListOperand()
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/openbsd-src/gnu/usr.bin/perl/t/op/
H A Dsprintf.t346 >%Vd< >1< >1<
/openbsd-src/sys/dev/microcode/symbol/
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216 …��������d`E`VbƂ���c��`Tc����Є��`�bƂ���c��`�c����Є��`�ceD��aE`�c��`VdĄ����`A����`Tc������…
/openbsd-src/gnu/llvm/llvm/tools/llvm-objdump/
H A DMachODump.cpp10446 MachO::version_min_command Vd = Obj->getVersionMinLoadCommand(Command); in PrintLoadCommands() local
10447 PrintVersionMinLoadCommand(Vd); in PrintLoadCommands()
/openbsd-src/games/fortune/datfiles/
H A Dfortunes2-o14244 Vd, n: