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Searched refs:V9 (Results 1 – 25 of 57) sorted by relevance

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/openbsd-src/gnu/usr.bin/gcc/contrib/
H A Dparanoia.cc990 FLOAT V, V0, V9; member
2093 V9 = POW (HInvrse, Y2); in main()
2094 printf (" %s .\n", V9.str()); in main()
2095 if (!((V9 >= Zero) && (V9 <= (Radix + Radix + E9) * UfThold))) in main()
2100 else if (!(V9 > UfThold * (One + E9))) in main()
2115 V9 = HInvrse * Y; in main()
2119 V9 = Y; in main()
2125 Y = V9; in main()
2126 V9 = HInvrse * Y; in main()
2128 while (V9 < Y); in main()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DREADME.txt8 * When in V9 mode, register allocate %icc[0-3].
38 1) should be replaced with a brz in V9 mode.
40 * Same as above, but emit conditional move on register zero (p192) in V9
49 * Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
H A DSparc.td35 "Enable SPARC-V9 instructions">;
38 "Enable deprecated V8 instructions in V9 mode">;
H A DSparcInstrInfo.td32 // HasV9 - This predicate is true when the target processor supports V9
37 // HasNoV9 - This predicate is true when the target doesn't have V9
39 // costs for V8 instructions that are more expensive than their V9 ones.
72 // V8, or when it is V9 but the V8 deprecated instructions are efficient enough
950 // Variants of FBCOND that uses V9 opcode
1123 // PC don't exist on the SparcV8, only the V9.
1492 // V9 Instructions
1495 // V9 Conditional Moves.
1497 // Move Integer Register on Condition (MOVcc) p. 194 of the V9 manual.
1567 // Floating-Point Move Instructions, p. 164 of the V9 manual.
/openbsd-src/gnu/gcc/gcc/config/sparc/
H A Dsparc.opt100 Use given SPARC-V9 code model
121 Mask(V9)
122 ;; Generate code for SPARC-V9
126 ;; in the V9 architecture.
H A Dsparc-modes.def4 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
H A Dpredicates.md141 ;; in either the medium/low or embedded medium/anywhere code models on V9.
163 ;; This is needed in the embedded medium/anywhere code model on V9. These
183 ;; This is needed in the embedded medium/anywhere code model on V9.
456 ;; Return true if OP is a comparison operator suitable for use in V9
/openbsd-src/sys/arch/sparc64/sparc64/
H A Ddb_disasm.c45 #ifndef V9
46 #define V9 macro
50 #ifdef V9
311 #ifdef V9
326 #ifdef V9
340 #ifdef V9
354 #ifdef V9
403 #ifdef V9
417 #ifdef V9
429 #ifdef V9
[all...]
/openbsd-src/gnu/usr.bin/gcc/gcc/testsuite/gcc.c-torture/compile/
H A Dsimd-5.x7 # On SPARC64/SPARC-V9 it fails, except with -m32.
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td96 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>>,
98 // Vector types returned as "direct" go into V2 .. V9; note that only the
102 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>>
153 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>>,
156 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>>
232 V8, V9, V10, V11, V12, V13]>>>,
237 V8, V9, V10, V11, V12, V13]>>>,
/openbsd-src/regress/lib/libcrypto/x509/bettertls/certificates/
H A D291.crt18 V9+iNsUT09vgu0KQ94IEFdp12EFme4dnXs5zABh7r4CSP5O2TP5hMuCTQWsXHG54
H A D2158.key19 W/1V9+2EwgB+EZcBh4cLELbfxBwUvS0GmlnpAHWDEr4Ix3+NZ22gL+v/qSWNoWK1
H A D1963.chain15 Zj4fU9kMZRng20FXLD6EZ6O24RFudjvp1jNXhEWqsd0eelC/q+RI+V9+IjfFUVBS
H A D2537.chain34 6N/Dm6z5xK4Rt5ZGx4s/YKWxhFJEUswTZH354o+iTBlListZ97Fegh8pfUZnh+V9
H A D2116.chain15 V9/XFRRK4hm54d6r/npeAGjDoRL+W2K46OdO/k3KwmGnbwmOF/zUOCJj00WL3X5o
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonCallingConv.td116 CCAssignToReg<[V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15]>>>,
130 CCAssignToReg<[V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15]>>>,
H A DHexagonRegisterInfo.cpp81 V0, V1, V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13, in getCallerSavedRegs()
/openbsd-src/gnu/usr.bin/gcc/gcc/config/sparc/
H A Dsparc-modes.def4 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
/openbsd-src/usr.bin/file/magdir/
H A Delf94 >>18 leshort 43 SPARC V9 - invalid byte order,
233 >>18 beshort 43 SPARC V9,
/openbsd-src/gnu/usr.bin/binutils-2.17/gas/doc/
H A Dc-sparc.texi72 @samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with
193 On the Sparc V9 processor, the @code{.xword} directive produces
/openbsd-src/gnu/usr.bin/binutils/gas/doc/
H A Dc-sparc.texi72 @samp{-Av8plusa} and @samp{-Av9a} enable the SPARC V9 instruction set with
193 On the Sparc V9 processor, the @code{.xword} directive produces
/openbsd-src/gnu/usr.bin/perl/
H A DREADME.aix43 IBM XL C and IBM XL C/C++ V8, V9, V10, V11
48 If you choose XL C/C++ V9 you need APAR IZ35785 installed
53 from IBM (April 2009 PTF for XL C/C++ Enterprise Edition for AIX, V9.0).
87 5.12.2 |5.3 TL8 SP8 32 bit | XL C/C++ V9 + IZ35785 | OK | OK
89 5.12.2 |5.3 TL8 SP8 64 bit | XL C/C++ V9 + IZ35785 | OK | OK
/openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCTargetDesc.cpp109 SystemZ::V8, SystemZ::V9, SystemZ::V10, SystemZ::V11,
/openbsd-src/gnu/llvm/lld/docs/
H A Dindex.rst26 32/64 big/little-endian, PowerPC, PowerPC64, RISC-V, SPARC V9, x86-32 and
/openbsd-src/gnu/llvm/llvm/docs/
H A DCompilerWriterInfo.rst119 * `SPARC V9 ABI <http://sparc.org/standards/64.psabi.1.35.ps.Z>`_

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