Searched refs:UseOp (Results 1 – 9 of 9) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 298 const MachineOperand *UseOp = in addLinkerOpt() local
302 if (UseOp && UseOp->isReg() && UseOp->getReg() == Pair.DefReg && in addLinkerOpt()
303 UseOp->isUse() && UseOp->isKill()) { in addLinkerOpt()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | MachineTraceMetrics.cpp | 629 unsigned UseOp; member
631 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) in DataDep()
632 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep()
635 DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp) in DataDep()
636 : UseOp(UseOp) { in DataDep()
803 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp); in updateDepth()
959 Dep.UseOp); in pushDepHeight()
1190 &PHI, Dep.UseOp); in getPHIDepth()
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| H A D | ScheduleDAGInstrs.cpp | 256 int UseOp = I->OpIdx; in addPhysRegDataDeps() local
259 if (UseOp < 0) in addPhysRegDataDeps()
271 (UseMIDesc && UseOp >= ((int)UseMIDesc->getNumOperands()) && in addPhysRegDataDeps()
275 RegUse, UseOp)); in addPhysRegDataDeps()
279 ST.adjustSchedDependency(SU, OperIdx, UseSU, UseOp, Dep); in addPhysRegDataDeps()
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| H A D | TwoAddressInstructionPass.cpp | 382 MachineOperand *UseOp = nullptr; in findOnlyInterestingUse() local
388 UseOp = &MO; in findOnlyInterestingUse()
390 if (!UseOp) in findOnlyInterestingUse()
392 MachineInstr &UseMI = *UseOp->getParent(); in findOnlyInterestingUse()
407 unsigned Src2 = UseMI.getOperandNo(UseOp); in findOnlyInterestingUse()
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| H A D | ModuloSchedule.cpp | 84 for (MachineOperand &UseOp : MRI.use_operands(Reg)) { in expand()
85 MachineInstr *UseMI = UseOp.getParent(); in expand()
1150 for (MachineOperand &UseOp : in rewriteScheduledInstr()
1152 MachineInstr *UseMI = UseOp.getParent(); in rewriteScheduledInstr()
1190 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()
1196 UseOp.setReg(SplitReg); in rewriteScheduledInstr()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 529 MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); in tryToFoldACImm() local
530 if (!UseOp.getSubReg() && Def && TII->isFoldableCopy(*Def)) { in tryToFoldACImm()
572 const MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); in foldOperand() local
574 if (!isUseSafeToFold(*UseMI, UseOp)) in foldOperand()
578 if (UseOp.isReg() && OpToFold.isReg() && in foldOperand()
579 (UseOp.isImplicit() || UseOp.getSubReg() != AMDGPU::NoSubRegister)) in foldOperand()
861 if (UseDesc.isVariadic() || UseOp.isImplicit() || in foldOperand()
896 if (UseOp.getSubReg() && AMDGPU::getRegBitWidth(FoldRC->getID()) == 64) { in foldOperand()
897 Register UseReg = UseOp.getReg(); in foldOperand()
904 if (UseOp.getSubReg() == AMDGPU::sub0) { in foldOperand()
[all …]
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| H A D | AMDGPUResourceUsageAnalysis.cpp | 75 for (const MachineOperand &UseOp : MRI.reg_operands(Reg)) { in hasAnyNonFlatUseOfReg() local
76 if (!UseOp.isImplicit() || !TII.isFLAT(*UseOp.getParent())) in hasAnyNonFlatUseOfReg()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 5354 int UseOp = -1; in getPartialRegUpdateClearance() local
5366 UseOp = MI.findRegisterUseOperandIdx(Reg, false, TRI); in getPartialRegUpdateClearance()
5371 UseOp = 3; in getPartialRegUpdateClearance()
5379 if (UseOp != -1 && MI.getOperand(UseOp).readsReg()) in getPartialRegUpdateClearance()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 11887 SDValue UseOp = User->getOperand(i); in ExtendUsesToFormExtLoad() local
11888 if (UseOp == N0) in ExtendUsesToFormExtLoad()
11890 if (!isa<ConstantSDNode>(UseOp)) in ExtendUsesToFormExtLoad()
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