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Searched refs:UseMI (Results 1 – 25 of 76) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp25 MachineInstr *UseMI; member
39 UseMI(MI), OpToFold(nullptr), ShrinkOpcode(ShrinkOp), UseOpNo(OpNo), in FoldCandidate()
78 bool frameIndexMayFold(const MachineInstr &UseMI, int OpNo,
91 bool tryToFoldACImm(const MachineOperand &OpToFold, MachineInstr *UseMI,
95 MachineInstr *UseMI,
164 bool SIFoldOperands::frameIndexMayFold(const MachineInstr &UseMI, int OpNo, in frameIndexMayFold() argument
169 const unsigned Opc = UseMI.getOpcode(); in frameIndexMayFold()
170 if (TII->isMUBUF(UseMI)) in frameIndexMayFold()
172 if (!TII->isFLATScratch(UseMI)) in frameIndexMayFold()
188 MachineInstr *MI = Fold.UseMI; in updateOperand()
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H A DSIOptimizeVGPRLiveRange.cpp214 for (auto &UseMI : MRI->use_nodbg_instructions(Reg)) { in findNonPHIUsesInBlock() local
215 if (UseMI.getParent() == MBB && !UseMI.isPHI()) in findNonPHIUsesInBlock()
216 Uses.push_back(&UseMI); in findNonPHIUsesInBlock()
305 auto *UseMI = I->getParent(); in collectCandidateRegisters() local
306 auto *UseMBB = UseMI->getParent(); in collectCandidateRegisters()
308 if (!UseMI->isPHI()) in collectCandidateRegisters()
311 auto *IncomingMBB = UseMI->getOperand(I.getOperandNo() + 1).getMBB(); in collectCandidateRegisters()
430 auto *UseMI = I->getParent(); in updateLiveRangeInThenRegion() local
431 if (UseMI->isPHI() && I->readsReg()) { in updateLiveRangeInThenRegion()
432 if (Blocks.contains(UseMI->getParent())) in updateLiveRangeInThenRegion()
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H A DSIFixSGPRCopies.cpp227 const auto *UseMI = MO.getParent(); in tryChangeVGPRtoSGPRinCopy() local
228 if (UseMI == &MI) in tryChangeVGPRtoSGPRinCopy()
230 if (MO.isDef() || UseMI->getParent() != MI.getParent() || in tryChangeVGPRtoSGPRinCopy()
231 UseMI->getOpcode() <= TargetOpcode::GENERIC_OP_END) in tryChangeVGPRtoSGPRinCopy()
234 unsigned OpIdx = UseMI->getOperandNo(&MO); in tryChangeVGPRtoSGPRinCopy()
235 if (OpIdx >= UseMI->getDesc().getNumOperands() || in tryChangeVGPRtoSGPRinCopy()
236 !TII->isOperandLegal(*UseMI, OpIdx, &Src)) in tryChangeVGPRtoSGPRinCopy()
795 const MachineInstr *UseMI = Use.getParent(); in processPHINode() local
796 AllAGPRUses &= (UseMI->isCopy() && in processPHINode()
797 TRI->isAGPR(*MRI, UseMI->getOperand(0).getReg())) || in processPHINode()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp92 bool xformUseMI(MachineInstr *TfrMI, MachineInstr *UseMI,
96 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI);
189 MachineInstr &UseMI = *NodeAddr<StmtNode *>(IA).Addr->getCode(); in canRemoveAddasl() local
193 MI.getParent() != UseMI.getParent()) in canRemoveAddasl()
196 const MCInstrDesc &UseMID = UseMI.getDesc(); in canRemoveAddasl()
198 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl()
199 getBaseWithLongOffset(UseMI) < 0) in canRemoveAddasl()
203 if (UseMID.mayStore() && UseMI.getOperand(2).isReg() && in canRemoveAddasl()
204 UseMI.getOperand(2).getReg() == MI.getOperand(0).getReg()) in canRemoveAddasl()
207 for (auto &Mo : UseMI.operands()) in canRemoveAddasl()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DMachineTraceMetrics.cpp650 static bool getDataDeps(const MachineInstr &UseMI, in getDataDeps() argument
654 if (UseMI.isDebugInstr()) in getDataDeps()
658 for (MachineInstr::const_mop_iterator I = UseMI.operands_begin(), in getDataDeps()
659 E = UseMI.operands_end(); I != E; ++I) { in getDataDeps()
672 Deps.push_back(DataDep(MRI, Reg, UseMI.getOperandNo(I))); in getDataDeps()
680 static void getPHIDeps(const MachineInstr &UseMI, in getPHIDeps() argument
687 assert(UseMI.isPHI() && UseMI.getNumOperands() % 2 && "Bad PHI"); in getPHIDeps()
688 for (unsigned i = 1; i != UseMI.getNumOperands(); i += 2) { in getPHIDeps()
689 if (UseMI.getOperand(i + 1).getMBB() == Pred) { in getPHIDeps()
690 Register Reg = UseMI.getOperand(i).getReg(); in getPHIDeps()
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H A DLiveRangeEdit.cpp211 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
223 if (UseMI && UseMI != MI) in foldAsLoad()
228 UseMI = MI; in foldAsLoad()
231 if (!DefMI || !UseMI) in foldAsLoad()
237 LIS.getInstructionIndex(*UseMI))) in foldAsLoad()
247 << " into single use: " << *UseMI); in foldAsLoad()
250 if (UseMI->readsWritesVirtualRegister(LI->reg(), &Ops).second) in foldAsLoad()
253 MachineInstr *FoldMI = TII.foldMemoryOperand(*UseMI, Ops, *DefMI, &LIS); in foldAsLoad()
257 LIS.ReplaceMachineInstrInMaps(*UseMI, *FoldMI); in foldAsLoad()
259 if (UseMI->shouldUpdateCallSiteInfo()) in foldAsLoad()
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H A DTargetSchedule.cpp170 const MachineInstr *UseMI, unsigned UseOperIdx) const { in computeOperandLatency() argument
177 if (UseMI) { in computeOperandLatency()
179 *UseMI, UseOperIdx); in computeOperandLatency()
209 if (!UseMI) in computeOperandLatency()
213 const MCSchedClassDesc *UseDesc = resolveSchedClass(UseMI); in computeOperandLatency()
216 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency()
H A DRegisterScavenging.cpp288 MachineBasicBlock::iterator &UseMI) { in findSurvivorReg() argument
345 UseMI = RestorePointMI; in findSurvivorReg()
454 MachineBasicBlock::iterator &UseMI) { in spill() argument
499 if (!TRI->saveScavengerRegister(*MBB, Before, UseMI, &RC, Reg)) { in spill()
516 TII->loadRegFromStackSlot(*MBB, UseMI, Reg, FI, &RC, TRI, Register()); in spill()
517 II = std::prev(UseMI); in spill()
565 MachineBasicBlock::iterator UseMI; in scavengeRegister() local
566 Register SReg = findSurvivorReg(I, Candidates, 25, UseMI); in scavengeRegister()
583 ScavengedInfo &Scavenged = spill(SReg, *RC, SPAdj, I, UseMI); in scavengeRegister()
584 Scavenged.Restore = &*std::prev(UseMI); in scavengeRegister()
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H A DMachineLICM.cpp959 for (MachineInstr &UseMI : MRI->use_instructions(CopyDstReg)) { in isCopyFeedingInvariantStore()
960 if (UseMI.mayStore() && isInvariantStore(UseMI, TRI, MRI)) in isCopyFeedingInvariantStore()
1023 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in HasLoopPHIUse()
1025 if (UseMI.isPHI()) { in HasLoopPHIUse()
1028 if (CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1033 if (isExitBlock(UseMI.getParent())) in HasLoopPHIUse()
1038 if (UseMI.isCopy() && CurLoop->contains(&UseMI)) in HasLoopPHIUse()
1039 Work.push_back(&UseMI); in HasLoopPHIUse()
1053 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in HasHighOperandLatency()
1054 if (UseMI.isCopyLike()) in HasHighOperandLatency()
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H A DDetectDeadLanes.cpp417 const MachineInstr &UseMI = *MO.getParent(); in determineInitialUsedLanes() local
418 if (UseMI.isKill()) in determineInitialUsedLanes()
422 if (lowersToCopies(UseMI)) { in determineInitialUsedLanes()
423 assert(UseMI.getDesc().getNumDefs() == 1); in determineInitialUsedLanes()
424 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes()
431 if (lowersToCopies(UseMI)) { in determineInitialUsedLanes()
433 CrossCopy = isCrossCopy(*MRI, UseMI, DstRC, MO); in determineInitialUsedLanes()
435 LLVM_DEBUG(dbgs() << "Copy across incompatible classes: " << UseMI); in determineInitialUsedLanes()
H A DOptimizePHIs.cpp155 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DstReg)) { in IsDeadPHICycle()
156 if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle)) in IsDeadPHICycle()
H A DMachineSSAUpdater.cpp235 MachineInstr *UseMI = U.getParent(); in RewriteUse() local
237 if (UseMI->isPHI()) { in RewriteUse()
238 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U); in RewriteUse()
241 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse()
H A DTailDuplicator.cpp218 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate() local
223 if (UseMI->isDebugValue()) { in tailDuplicateAndUpdate()
227 if (UseMI->getParent() == DefBB && !UseMI->isPHI()) in tailDuplicateAndUpdate()
232 MachineInstr *UseMI = UseMO->getParent(); in tailDuplicateAndUpdate() local
234 SSAUpdate.GetValueInMiddleOfBlock(UseMI->getParent(), true)); in tailDuplicateAndUpdate()
299 for (MachineInstr &UseMI : MRI->use_instructions(Reg)) { in isDefLiveOut()
300 if (UseMI.isDebugValue()) in isDefLiveOut()
302 if (UseMI.getParent() != BB) in isDefLiveOut()
H A DPeepholeOptimizer.cpp503 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() local
504 if (UseMI == &MI) in INITIALIZE_PASS_DEPENDENCY()
507 if (UseMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
533 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG) in INITIALIZE_PASS_DEPENDENCY()
536 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
539 if (!LocalMIs.count(UseMI)) in INITIALIZE_PASS_DEPENDENCY()
576 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() local
577 MachineBasicBlock *UseMBB = UseMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
602 RC = MRI->getRegClass(UseMI->getOperand(0).getReg()); in INITIALIZE_PASS_DEPENDENCY()
605 BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), in INITIALIZE_PASS_DEPENDENCY()
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H A DRegisterCoalescer.cpp883 MachineInstr *UseMI = MO.getParent(); in removeCopyByCommutingDef() local
884 unsigned OpNo = &MO - &UseMI->getOperand(0); in removeCopyByCommutingDef()
885 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef()
890 if (UseMI->isRegTiedToDefOperand(OpNo)) in removeCopyByCommutingDef()
928 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef() local
929 if (UseMI->isDebugInstr()) { in removeCopyByCommutingDef()
935 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef()
946 if (UseMI == CopyMI) in removeCopyByCommutingDef()
948 if (!UseMI->isCopy()) in removeCopyByCommutingDef()
950 if (UseMI->getOperand(0).getReg() != IntB.reg() || in removeCopyByCommutingDef()
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H A DTwoAddressInstructionPass.cpp392 MachineInstr &UseMI = *UseOp->getParent(); in findOnlyInterestingUse() local
396 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) { in findOnlyInterestingUse()
398 return &UseMI; in findOnlyInterestingUse()
401 if (isTwoAddrUse(UseMI, Reg, DstReg)) { in findOnlyInterestingUse()
403 return &UseMI; in findOnlyInterestingUse()
405 if (UseMI.isCommutable()) { in findOnlyInterestingUse()
407 unsigned Src2 = UseMI.getOperandNo(UseOp); in findOnlyInterestingUse()
408 if (TII->findCommutedOpIndices(UseMI, Src1, Src2)) { in findOnlyInterestingUse()
409 MachineOperand &MO = UseMI.getOperand(Src1); in findOnlyInterestingUse()
411 isTwoAddrUse(UseMI, MO.getReg(), DstReg)) { in findOnlyInterestingUse()
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H A DModuloSchedule.cpp85 MachineInstr *UseMI = UseOp.getParent(); in expand() local
86 int UseStage = Schedule.getStage(UseMI); in expand()
1152 MachineInstr *UseMI = UseOp.getParent(); in rewriteScheduledInstr() local
1153 if (UseMI->getParent() != BB) in rewriteScheduledInstr()
1155 if (UseMI->isPHI()) { in rewriteScheduledInstr()
1156 if (!Phi->isPHI() && UseMI->getOperand(0).getReg() == NewReg) in rewriteScheduledInstr()
1158 if (getLoopPhiReg(*UseMI, BB) != OldReg) in rewriteScheduledInstr()
1161 InstrMapTy::iterator OrigInstr = InstrMap.find(UseMI); in rewriteScheduledInstr()
1193 BuildMI(*BB, UseMI, UseMI->getDebugLoc(), TII->get(TargetOpcode::COPY), in rewriteScheduledInstr()
1623 for (MachineInstr &UseMI : MRI.use_instructions(DefMO.getReg())) { in filterInstructions()
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/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp361 for (const MachineInstr &UseMI : MRI->use_instructions(DestReg)) { in foldIntoMemoryOps() local
362 switch (UseMI.getOpcode()) { in foldIntoMemoryOps()
364 LLVM_DEBUG(dbgs() << "Not a load or store instruction: " << UseMI); in foldIntoMemoryOps()
383 if (UseMI.getOperand(1).isFI()) in foldIntoMemoryOps()
386 if (DestReg == UseMI.getOperand(0).getReg()) in foldIntoMemoryOps()
388 assert(DestReg == UseMI.getOperand(1).getReg() && in foldIntoMemoryOps()
391 int64_t Offset = UseMI.getOperand(2).getImm(); in foldIntoMemoryOps()
417 for (MachineInstr &UseMI : in foldIntoMemoryOps()
419 UseMI.removeOperand(2); in foldIntoMemoryOps()
420 UseMI.addOperand(ImmOp); in foldIntoMemoryOps()
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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86FastPreTileConfig.cpp73 void reload(MachineBasicBlock::iterator UseMI, Register VirtReg,
219 void X86FastPreTileConfig::reload(MachineBasicBlock::iterator UseMI, in reload() argument
233 if (UseMI->isCopy()) in reload()
234 TileReg = UseMI->getOperand(0).getReg(); in reload()
243 MachineInstr *NewMI = BuildMI(*UseMI->getParent(), UseMI, DebugLoc(), in reload()
247 BuildMI(*UseMI->getParent(), UseMI, DebugLoc(), TII->get(Opc), TileReg) in reload()
257 if (UseMI->isCopy()) { in reload()
258 UseMI->eraseFromParent(); in reload()
261 for (auto &MO : UseMI->operands()) { in reload()
626 for (MachineInstr &UseMI : MRI->use_instructions(TileReg)) { in configBasicBlock()
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H A DX86SpeculativeLoadHardening.cpp1791 for (MachineInstr &UseMI : MRI->use_instructions(DefReg)) { in sinkPostLoadHardenedInst()
1794 if (HardenedInstrs.count(&UseMI)) { in sinkPostLoadHardenedInst()
1795 if (!X86InstrInfo::isDataInvariantLoad(UseMI) || isEFLAGSDefLive(UseMI)) { in sinkPostLoadHardenedInst()
1799 assert(X86InstrInfo::isDataInvariant(UseMI) && in sinkPostLoadHardenedInst()
1806 const MCInstrDesc &Desc = UseMI.getDesc(); in sinkPostLoadHardenedInst()
1813 UseMI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in sinkPostLoadHardenedInst()
1815 UseMI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in sinkPostLoadHardenedInst()
1831 if (!X86InstrInfo::isDataInvariant(UseMI) || UseMI.getParent() != MI.getParent() || in sinkPostLoadHardenedInst()
1832 isEFLAGSDefLive(UseMI)) in sinkPostLoadHardenedInst()
1837 if (UseMI.getDesc().getNumDefs() > 1) in sinkPostLoadHardenedInst()
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DLocalizer.cpp126 MachineInstr &UseMI = *MOUse.getParent(); in localizeInterBlock() local
127 if (MRI->hasOneUse(Reg) && !UseMI.isPHI()) in localizeInterBlock()
128 InsertMBB->insert(UseMI, LocalizedMI); in localizeInterBlock()
163 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(Reg)) { in localizeIntraBlock()
164 if (!UseMI.isPHI()) in localizeIntraBlock()
165 Users.insert(&UseMI); in localizeIntraBlock()
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp122 MachineInstr *UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg() local
123 if (UseMI->getParent() != MBB) in getDefReg()
126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
127 Reg = UseMI->getOperand(0).getReg(); in getDefReg()
130 UseMI = &*MRI->use_instr_nodbg_begin(Reg); in getDefReg()
131 if (UseMI->getParent() != MBB) in getDefReg()
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp679 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
680 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
692 LLVM_DEBUG(UseMI.dump()); in recordUnoptimizableWebs()
701 Register SwapDefReg = UseMI.getOperand(0).getReg(); in recordUnoptimizableWebs()
713 LLVM_DEBUG(UseMI.dump()); in recordUnoptimizableWebs()
745 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs()
746 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs()
787 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
788 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval()
792 LLVM_DEBUG(UseMI.dump()); in markSwapsForRemoval()
/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/
H A DMips16RegisterInfo.cpp58 MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, in saveScavengerRegister() argument
63 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); in saveScavengerRegister()
/openbsd-src/gnu/llvm/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp578 bool VEInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() argument
639 LLVM_DEBUG(UseMI.dump()); in FoldImmediate()
661 switch (UseMI.getOpcode()) { in FoldImmediate()
708 if (UseMI.getOperand(1).getReg() == Reg) { in FoldImmediate()
711 assert(UseMI.getOperand(2).getReg() == Reg); in FoldImmediate()
725 if (UseMI.getOperand(1).getReg() == Reg) { in FoldImmediate()
732 assert(UseMI.getOperand(2).getReg() == Reg); in FoldImmediate()
745 UseMI.setDesc(get(NewUseOpc)); in FoldImmediate()
747 UseMI.getOperand(1).setReg(UseMI.getOperand(UseIdx).getReg()); in FoldImmediate()
749 UseMI.getOperand(UseIdx).ChangeToImmediate(ImmVal); in FoldImmediate()

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